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Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: [SOLVED] Tiny but mighty: TLV7011 comparator

    Started by B. David Miyares, 1st May 2018 14:19
    • Replies: 0
    • Views: 3,392
    B. David Miyares
    1st May 2018, 14:19 Go to last post

  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 30,958
    klug
    3rd December 2007, 18:00 Go to last post

  1. Including geometric variation of transistors using Montecarlo simulation in Cadence

    Started by Junus2012, 10th December 2019 21:49
    • Replies: 3
    • Views: 195
    Dominik Przyborowski
    Yesterday, 18:54 Go to last post

  2. nedding help to setup pole zero analyses in cadence

    Started by Junus2012, 10th December 2019 19:44
    2 Attachment(s)
    • Replies: 3
    • Views: 147
    jjx
    Yesterday, 13:04 Go to last post

  3. CMOS Fabrication process in 80s and 90s

    Started by EEcrazy, Yesterday 06:56
    • Replies: 0
    • Views: 82
    EEcrazy
    Yesterday, 06:56 Go to last post

  4. Replica circuit design to generate internal common mode voltage for the two stage OPA

    Started by Junus2012, 9th December 2019 22:57
    1 Attachment(s)
    • Replies: 0
    • Views: 164
    Junus2012
    9th December 2019, 22:57 Go to last post

  5. Stability issue of the closed loop feedback in fully differential ampliifer

    Started by Junus2012, 6th December 2019 17:54
    • Replies: 5
    • Views: 395
    Junus2012
    9th December 2019, 20:19 Go to last post

  6. Designing of high GBW opamp

    Started by Junus2012, 4th December 2019 22:24
    • Replies: 4
    • Views: 365
    sutapanaki
    6th December 2019, 21:30 Go to last post

  7. Gain bandwidth issue of fully differential amplifier

    Started by Junus2012, 4th December 2019 18:26
    2 Attachment(s)
    • Replies: 7
    • Views: 374
    sutapanaki
    6th December 2019, 20:42 Go to last post

  8. PCB for testing a SAR ADC?

    Started by Electric_Shock, 6th December 2019 17:08
    • Replies: 1
    • Views: 161
    barry
    6th December 2019, 17:58 Go to last post

  9. 65nm bonding and pad size

    Started by Franck6367, 28th November 2019 10:08
    • Replies: 3
    • Views: 260
    rangermad
    6th December 2019, 16:54 Go to last post

  10. TSMC65nm Bondpads and ESD.

    Started by Nancy12345, 6th December 2019 00:06
    • Replies: 0
    • Views: 175
    Nancy12345
    6th December 2019, 00:06 Go to last post

  11. How to plot the profile of collected charge versus position (X or Y) in Silvaco?

    Started by msoleimaninia, 4th December 2019 13:43
    • Replies: 0
    • Views: 152
    msoleimaninia
    4th December 2019, 13:43 Go to last post

  12. Semiconductor software simulation

    Started by clros, 3rd December 2019 20:54
    • Replies: 4
    • Views: 264
    timof
    4th December 2019, 07:52 Go to last post

  13. Latchup Caused by diodes

    Started by kouakro, 3rd December 2019 15:16
    • Replies: 2
    • Views: 236
    dick_freebird
    3rd December 2019, 17:13 Go to last post

  14. When ad7321 collects voltage, a spike voltage appears

    Started by Malugu, 3rd December 2019 15:10
    2 Attachment(s)
    • Replies: 2
    • Views: 163
    FvM
    3rd December 2019, 16:04 Go to last post

  15. Moved: CAN Transceiver Chip calculating effective CANH to CANL capacitance

    Started by ku637, 3rd December 2019 09:15
    •  
    •  

  16. [SOLVED] ADEXL simulation problem in cadence

    Started by Junus2012, 29th November 2019 16:50
    3 Attachment(s)
    • Replies: 11
    • Views: 614
    Junus2012
    2nd December 2019, 22:49 Go to last post

  17. Source follower design issue for cascoded two stage op-amp

    Started by Junus2012, 5th November 2019 16:26
    1 Attachment(s)
    • Replies: 5
    • Views: 430
    erikl
    29th November 2019, 21:37 Go to last post

  18. Rail to rail input folded operational amplifier

    Started by Junus2012, 7th November 2019 15:07
    2 Attachment(s)
    • Replies: 3
    • Views: 384
    erikl
    28th November 2019, 15:41 Go to last post

  19. Cascoded diode connection for biasing single mirror transsitor

    Started by Junus2012, 28th November 2019 14:46
    2 Attachment(s)
    • Replies: 1
    • Views: 189
    jjx
    28th November 2019, 15:39 Go to last post

  20. Moved: [Moved:] STM32L072RBT6 IAP jump to APP interrupt no response

    Started by Malugu, 28th November 2019 11:04
    •  
    •  

  21. DC-DC Switched-Mode Power Supply System

    Started by bharath_k, 28th November 2019 00:18
    2 Attachment(s)
    • Replies: 1
    • Views: 294
    Easy peasy
    28th November 2019, 01:42 Go to last post

  22. In snapback mechanism how voltage reduces when parasitic NPN is turned ON?

    Started by MubarakKhan, 25th November 2019 13:46
    • Replies: 2
    • Views: 217
    dick_freebird
    27th November 2019, 21:30 Go to last post

  23. Calibre LVS Extraction Report Warnings Question.

    Started by Trafford, 25th November 2019 22:35
    1 Attachment(s)
    • Replies: 1
    • Views: 227
    erikl
    27th November 2019, 19:11 Go to last post

  24. Step response of fully differential amplifieer

    Started by Junus2012, 24th November 2019 16:35
    1 Attachment(s)
    • Replies: 3
    • Views: 363
    sutapanaki
    26th November 2019, 21:45 Go to last post

  25. fuel gauge using Bq34110 , SOC calculation.

    Started by anilrockstar, 26th November 2019 08:30
    • Replies: 1
    • Views: 231
    KlausST
    26th November 2019, 19:15 Go to last post

  26. Temperature mobility degradation factor (c) - MOSFET SOI

    Started by lufer17, 16th November 2019 00:42
    • Replies: 3
    • Views: 406
    timof
    25th November 2019, 08:16 Go to last post

  27. Simple CMFB using two transistors only

    Started by Junus2012, 22nd November 2019 18:21
    3 Attachment(s)
    • Replies: 3
    • Views: 382
    Junus2012
    24th November 2019, 18:23 Go to last post

  28. Current Reference in Sub-Threshold region

    Started by gokulpgk, 20th November 2019 17:35
    1 Attachment(s)
    • Replies: 3
    • Views: 379
    frankrose
    21st November 2019, 23:48 Go to last post

  29. Problem in layout result of MOS pseudo resistor

    Started by Junus2012, 21st November 2019 14:18
    5 Attachment(s)
    • Replies: 1
    • Views: 188
    jjx
    21st November 2019, 15:19 Go to last post

  30. on-resistance of a mosfet

    Started by SAMIRAZ, 19th October 2019 21:48
    • Replies: 2
    • Views: 419
    SAMIRAZ
    19th November 2019, 14:18 Go to last post
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