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Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: [SOLVED] Tiny but mighty: TLV7011 comparator

    Started by B. David Miyares, 1st May 2018 14:19
    • Replies: 0
    • Views: 5,857
    B. David Miyares
    1st May 2018, 14:19 Go to last post

  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 33,441
    klug
    3rd December 2007, 18:00 Go to last post

  1. How to simulate line regulation and load regulation in LDO

    Started by aoene23, Today 11:44
    • Replies: 2
    • Views: 117
    sutapanaki
    Today, 18:57 Go to last post

  2. LVS warning: Undefined parameter "Series"

    Started by zilch, 24th February 2020 16:25
    • Replies: 0
    • Views: 149
    zilch
    24th February 2020, 16:25 Go to last post

  3. Netlist is different between schematic and layout

    Started by Junus2012, 17th February 2020 21:01
    11 Attachment(s)
    • Replies: 14
    • Views: 664
    sutapanaki
    23rd February 2020, 22:15 Go to last post

  4. Import pspice .cir file into cadence

    Started by kokokosini123, 21st February 2020 16:33
    7 Attachment(s)
    • Replies: 5
    • Views: 333
    kokokosini123
    23rd February 2020, 16:07 Go to last post

  5. parasitic cell blocking

    Started by SAMIRAZ, 13th February 2020 14:29
    • Replies: 4
    • Views: 390
    timof
    23rd February 2020, 04:02 Go to last post

  6. PLL Phase Noise Simulation

    Started by Ata_sa16, 23rd February 2020 00:01
    • Replies: 0
    • Views: 152
    Ata_sa16
    23rd February 2020, 00:01 Go to last post

  7. common mode feedback question

    Started by yefj, 19th February 2020 20:45
    1 Attachment(s)
    • Replies: 8
    • Views: 424
    yefj
    22nd February 2020, 19:18 Go to last post

  8. folded cascode with gm/id

    Started by yefj, 19th February 2020 13:34
    2 Attachment(s)
    • Replies: 1
    • Views: 193
    frankrose
    19th February 2020, 19:10 Go to last post

  9. Design CMOS transmission gate for digital switch in programmable resistors

    Started by Junus2012, 13th February 2020 21:11
    • Replies: 1
    • Views: 185
    vivekroy
    19th February 2020, 18:50 Go to last post

  10. Switch size in a resistive trim network ?

    Started by cmos_ajay, 14th February 2020 14:02
    1 Attachment(s)
    • Replies: 4
    • Views: 299
    frankrose
    19th February 2020, 00:09 Go to last post

  11. Measure inl of an ADC in cadence

    Started by Chinmaye, 17th February 2020 05:25
    • Replies: 4
    • Views: 300
    Ata_sa16
    17th February 2020, 21:06 Go to last post

  12. How to combine Cadence Encounter Layout and Cadence Virtuoso Layout together?

    Started by Trafford, 13th February 2020 21:15
    • Replies: 1
    • Views: 263
    jjx
    14th February 2020, 23:28 Go to last post

  13. Needing to set up an oscillator circuit with frequency adjustment that can drive 8led

    Started by jfminformatica, 14th February 2020 22:06
    • Replies: 1
    • Views: 168
    KlausST
    14th February 2020, 22:13 Go to last post

  14. Extracting SPICE Model Parameters From Diode

    Started by switchy, 6th February 2020 16:52
    • Replies: 1
    • Views: 258
    chiques
    13th February 2020, 20:35 Go to last post

  15. Ocean script plot - changing axis labels ??

    Started by cmos_ajay, 11th February 2020 15:36
    • Replies: 6
    • Views: 435
    vivekroy
    13th February 2020, 11:12 Go to last post

  16. Abrupt phase and amplitude change is GaAs Willkinson divider layout momentum simulati

    Started by Jademobile, 12th February 2020 05:03
    • Replies: 0
    • Views: 172
    Jademobile
    12th February 2020, 05:03 Go to last post

  17. Designing Class AB Power amplifier with max. PAE

    Started by OZZAA, 10th February 2020 12:28
    8 Attachment(s)
    • Replies: 4
    • Views: 452
    OZZAA
    12th February 2020, 04:08 Go to last post

  18. BJT Models for Cadence Simulation

    Started by Puppet123, 11th February 2020 02:15
    • Replies: 1
    • Views: 263
    BigBoss
    11th February 2020, 02:21 Go to last post

  19. Optimum strategy to layout MOSFET cascoded mirror

    Started by Junus2012, 7th February 2020 12:31
    1 Attachment(s)
    • Replies: 1
    • Views: 270
    frankrose
    9th February 2020, 21:05 Go to last post

  20. Active and inactive dummy transistors in the matched array transistors

    Started by Junus2012, 4th February 2020 11:01
    3 Attachment(s)
    • Replies: 9
    • Views: 702
    sutapanaki
    7th February 2020, 19:29 Go to last post

  21. error running Ocean script in Cadence ?

    Started by cmos_ajay, 7th February 2020 10:46
    • Replies: 5
    • Views: 372
    pancho_hideboo
    7th February 2020, 13:03 Go to last post

  22. Phased Locked Loop Noise

    Started by Puppet123, 5th February 2020 18:56
    • Replies: 1
    • Views: 234
    Ata_sa16
    6th February 2020, 02:43 Go to last post

  23. Different transistor orientation in different matched MOS array

    Started by Junus2012, 4th February 2020 11:09
    • Replies: 3
    • Views: 348
    Junus2012
    5th February 2020, 14:57 Go to last post

  24. Discrete Time Sigma Delta Modulators

    Started by Puppet123, 5th February 2020 02:25
    1 Attachment(s)
    • Replies: 2
    • Views: 363
    FvM
    5th February 2020, 10:05 Go to last post

  25. Question Regarding Max Current Per Width

    Started by OrangeHalo, 5th February 2020 03:28
    • Replies: 1
    • Views: 223
    timof
    5th February 2020, 04:38 Go to last post

  26. Has anybody used Oceane for IC design

    Started by pekachoo007, 18th January 2020 13:03
    • Replies: 2
    • Views: 828
    Puppet123
    5th February 2020, 02:11 Go to last post

  27. Fractional N Synthesizer - Dual or Multi-Modulus Divider

    Started by doctorworm, 28th January 2020 06:31
    1 Attachment(s)
    • Replies: 6
    • Views: 726
    doctorworm
    1st February 2020, 15:31 Go to last post

  28. IC tape-out with TSMC - export license required?

    Started by ehawker, 1st February 2020 04:25
    • Replies: 1
    • Views: 360
    timof
    1st February 2020, 05:16 Go to last post

  29. Maximum current of the CMFB circuit

    Started by Junus2012, 30th January 2020 12:56
    1 Attachment(s)
    • Replies: 5
    • Views: 527
    erikl
    31st January 2020, 21:33 Go to last post

  30. Controlling partial or the whole current in CMFB

    Started by Junus2012, 31st January 2020 09:56
    • Replies: 1
    • Views: 279
    sutapanaki
    31st January 2020, 19:06 Go to last post
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