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Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: [SOLVED] Tiny but mighty: TLV7011 comparator

    Started by B. David Miyares, 1st May 2018 14:19
    • Replies: 0
    • Views: 6,922
    1st May 2018, 14:19 Go to last post
  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 34,511
    3rd December 2007, 18:00 Go to last post
  1. Rail to rail circuit simulation

    Started by ibiteee, 19th May 2020 15:35
    • Replies: 8
    • Views: 321
    Today, 09:09 Go to last post
  2. Time Interleaved ADC Filtering at Output

    Started by Puppet123, 23rd May 2020 22:40
    • Replies: 3
    • Views: 254
    Yesterday, 23:13 Go to last post
    • Replies: 8
    • Views: 278
    23rd May 2020, 21:47 Go to last post
  3. Bulk fixing (gluing) CMOS

    Started by lufer17, 23rd May 2020 14:49
    • Replies: 1
    • Views: 134
    23rd May 2020, 18:46 Go to last post
  4. Verilog and VHDL noise modelling

    Started by deep_sea, 20th May 2020 12:28
    • Replies: 5
    • Views: 290
    22nd May 2020, 11:14 Go to last post
  5. The stability of the power amplifier

    Started by OZZAA, 5th April 2020 08:01
    • Replies: 3
    • Views: 500
    20th May 2020, 01:01 Go to last post
    • Replies: 3
    • Views: 266
    19th May 2020, 10:13 Go to last post
    • Replies: 11
    • Views: 745
    16th May 2020, 09:07 Go to last post
  6. Trends in Analog IP for ASIC Design

    Started by JElectric, 6th May 2020 12:46
    • Replies: 7
    • Views: 649
    15th May 2020, 23:44 Go to last post
  7. Layout of big transistors

    Started by Junus2012, 14th May 2020 23:19
    • Replies: 3
    • Views: 299
    15th May 2020, 18:31 Go to last post
    • Replies: 12
    • Views: 865
    15th May 2020, 10:52 Go to last post
    • Replies: 11
    • Views: 728
    14th May 2020, 23:40 Go to last post
  8. Matching the biasing circuit to the core amplifier

    Started by Junus2012, 2nd May 2020 22:07
    2 Pages
    1 2
    • Replies: 20
    • Views: 1,847
    13th May 2020, 17:39 Go to last post
    • Replies: 7
    • Views: 1,563
    13th May 2020, 10:39 Go to last post
  9. SAR ADC Architecture Blocks

    Started by Adithya_Pai, 1st May 2020 19:40
    • Replies: 5
    • Views: 1,227
    9th May 2020, 18:46 Go to last post
  10. Is this CMRR plot correct?

    Started by fat_123, 7th May 2020 21:19
    • Replies: 3
    • Views: 399
    9th May 2020, 13:32 Go to last post
    • Replies: 10
    • Views: 1,375
    9th May 2020, 12:05 Go to last post
  11. CMOS differential OPAmp

    Started by MILIND_7, 18th March 2020 10:53
    • Replies: 5
    • Views: 671
    9th May 2020, 10:13 Go to last post
  12. Level converter devices

    Started by joniengr, 8th May 2020 08:24
    • Replies: 1
    • Views: 188
    8th May 2020, 08:52 Go to last post
  13. Cascoding the two stage folded class AB ampliifer

    Started by Junus2012, 28th March 2020 17:31
    2 Pages
    1 2
    • Replies: 21
    • Views: 3,307
    7th May 2020, 21:59 Go to last post
  14. Measure inl of an ADC in cadence

    Started by Chinmaye, 17th February 2020 05:25
    • Replies: 5
    • Views: 756
    7th May 2020, 21:21 Go to last post
    • Replies: 3
    • Views: 953
    7th May 2020, 21:12 Go to last post
    • Replies: 12
    • Views: 831
    7th May 2020, 16:21 Go to last post
    • Replies: 2
    • Views: 882
    7th May 2020, 15:44 Go to last post
    • Replies: 7
    • Views: 1,123
    6th May 2020, 19:13 Go to last post
  15. How to approach CDAC of SAR using SPICE

    Started by Adithya_Pai, 6th May 2020 16:34
    • Replies: 0
    • Views: 196
    6th May 2020, 16:34 Go to last post
  16. Stability circles smith chart problem

    Started by yefj, 26th April 2020 19:06
    • Replies: 1
    • Views: 305
    6th May 2020, 03:14 Go to last post