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Forum: Analog Integrated Circuit (IC) Design, Layout and Fabrication

Analog Integrated Circuit Design, Layout & Fabrication Questions. Analog ASIC Design. Semiconductor Technology Issues.

  1. Sticky Thread Sticky: [SOLVED] Tiny but mighty: TLV7011 comparator

    Started by B. David Miyares, 1st May 2018 14:19
    • Replies: 0
    • Views: 2,190
    B. David Miyares
    1st May 2018, 14:19 Go to last post

  2. Sticky Thread Sticky: Read this before posting

    Started by klug, 3rd December 2007 18:00
    • Replies: 0
    • Views: 29,732
    klug
    3rd December 2007, 18:00 Go to last post

  1. mosfet as a switch in 28nm technology

    Started by aka_rabbi, Yesterday 06:41
    • Replies: 3
    • Views: 93
    vivekroy
    Today, 05:15 Go to last post

  2. Deep nwell connection

    Started by vsupadhya, 19th July 2019 07:20
    • Replies: 2
    • Views: 103
    quyleanh
    Today, 03:34 Go to last post

  3. [SOLVED] Need RF examples lib.

    Started by Nancy12345, Yesterday 04:30
    • Replies: 4
    • Views: 86
    Nancy12345
    Today, 02:20 Go to last post

  4. sfdr simulation in Matlab

    Started by shanmei, 9th July 2019 15:38
    2 Attachment(s)
    • Replies: 1
    • Views: 172
    Puppet123
    Today, 01:13 Go to last post

  5. LC VCO with Capacitor filter, what is the cap doing?

    Started by mvj, 17th June 2019 11:37
    1 Attachment(s)
    • Replies: 6
    • Views: 341
    saro_k_82
    Yesterday, 18:18 Go to last post

  6. What's the difference between stacked and cascode configurations?

    Started by circuitking, 20th July 2019 21:48
    2 Attachment(s)
    • Replies: 5
    • Views: 221
    circuitking
    Yesterday, 13:41 Go to last post

  7. DRC and LVS in Calibre

    Started by Ata-Va, 20th July 2019 00:17
    • Replies: 2
    • Views: 237
    slizak
    22nd July 2019, 16:58 Go to last post

  8. Mixed Signal IC Grounds

    Started by Alexxk, 25th June 2019 12:03
    • Replies: 7
    • Views: 388
    vivekroy
    22nd July 2019, 06:55 Go to last post

  9. Op-amp and compensation

    Started by venn_ng, 3rd June 2019 03:22
    1 Attachment(s)
    • Replies: 4
    • Views: 379
    saro_k_82
    21st July 2019, 15:52 Go to last post

  10. DNL/INL Using Cadence ahdlLib blocks

    Started by Puppet123, 21st July 2019 01:06
    • Replies: 0
    • Views: 100
    Puppet123
    21st July 2019, 01:40 Go to last post

  11. MOSFET Speed and power tradeoff

    Started by circuitking, 15th July 2019 10:45
    • Replies: 5
    • Views: 296
    BradtheRad
    20th July 2019, 17:04 Go to last post

  12. Deciding orientation in IO cells

    Started by vsupadhya, 19th July 2019 07:17
    • Replies: 1
    • Views: 81
    ThisIsNotSam
    19th July 2019, 14:30 Go to last post

  13. [SOLVED] Stability Simulation with Cadence

    Started by Junus2012, 12th March 2019 22:10
    3 Pages •
    1 2 3
    27 Attachment(s)
    • Replies: 47
    • Views: 2,303
    czjpassby
    19th July 2019, 08:21 Go to last post

  14. What if fin width of finfet will adjust..

    Started by santoshraghu456, 16th July 2019 08:25
    • Replies: 3
    • Views: 237
    ThisIsNotSam
    17th July 2019, 16:16 Go to last post

  15. Verilog Coding in Cadence Vertuoso

    Started by Junus2012, 16th July 2019 17:48
    2 Attachment(s)
    • Replies: 4
    • Views: 198
    ThisIsNotSam
    17th July 2019, 13:56 Go to last post

  16. Zero threshold MOSFET design

    Started by decaf14, 15th July 2019 22:13
    • Replies: 4
    • Views: 261
    decaf14
    16th July 2019, 18:48 Go to last post

  17. Why we should choose even number of finger

    Started by quyleanh, 10th July 2019 05:30
    • Replies: 7
    • Views: 411
    quyleanh
    16th July 2019, 06:33 Go to last post

  18. Nand gate using bsim-cmg

    Started by neku, 15th July 2019 17:36
    • Replies: 0
    • Views: 103
    neku
    15th July 2019, 17:36 Go to last post

  19. Masking and non-masking the alphabet and numbers on the top side of fabricated chip.

    Started by issacchook, 27th June 2019 05:29
    • Replies: 1
    • Views: 183
    kripacharya
    13th July 2019, 21:03 Go to last post

  20. Best books for Current mirrors and differential amplifiers using MOSFFET

    Started by circuitking, 11th July 2019 23:28
    • Replies: 4
    • Views: 326
    circuitking
    12th July 2019, 13:31 Go to last post

  21. The issue of Assura LVS

    Started by l.kim, 12th July 2019 08:36
    • Replies: 1
    • Views: 133
    rangermad
    12th July 2019, 13:03 Go to last post

  22. "calibre view generation encountered a fatal error" but spectre PEX extraction works

    Started by OG_, 11th June 2019 15:48
    4 Attachment(s)
    • Replies: 13
    • Views: 1,148
    ljp2706
    12th July 2019, 00:38 Go to last post

  23. Update schematic regarding layout

    Started by hannover90, 9th July 2019 19:14
    • Replies: 1
    • Views: 283
    strotta
    10th July 2019, 11:42 Go to last post

  24. Looking for 'Introduction to CMOS OP-AMPs and Comparators' ebook

    Started by hobbyiclearner, 23rd June 2019 20:05
    • Replies: 10
    • Views: 548
    timof
    9th July 2019, 00:53 Go to last post

  25. Understanding the inversion coefficient proposed by EKV

    Started by Alex Liao, 5th July 2019 16:02
    • Replies: 2
    • Views: 347
    Alex Liao
    8th July 2019, 15:42 Go to last post

  26. How Device Resistance change with respect to W and L in any technoogy

    Started by circuitking, 7th July 2019 09:17
    2 Attachment(s)
    • Replies: 2
    • Views: 328
    pancho_hideboo
    7th July 2019, 15:41 Go to last post

  27. Comparator characterization for variable input

    Started by iaf, 4th July 2019 14:31
    • Replies: 6
    • Views: 311
    KlausST
    4th July 2019, 22:08 Go to last post

  28. Difference between S3 and T3 Layer used in 22FDX Technology

    Started by Vishu21_95, 4th July 2019 12:41
    • Replies: 0
    • Views: 151
    Vishu21_95
    4th July 2019, 12:41 Go to last post

  29. Why is pmos and nmos put vertically and not side by side(horizontally)in ic layouts?

    Started by 94d33m, 2nd July 2019 18:18
    • Replies: 6
    • Views: 408
    Vishu21_95
    3rd July 2019, 15:06 Go to last post

  30. [SOLVED] Use of hybrid layer in devices

    Started by Vishu21_95, 1st July 2019 05:58
    • Replies: 3
    • Views: 269
    dr_kca
    2nd July 2019, 11:47 Go to last post
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