peen1
Member level 2
deleting top-level ports
Hi All,
I am trying to do synthesis and synopsys is removing un-connected output ports. This gives problems when I do simulations. Like the simulation tool looks for Q and Q-bar in a flop.
How do I tell DC not to remove un-connected ports? Can DC insert some wire in the port and leave it?
Thanks
Hi All,
I am trying to do synthesis and synopsys is removing un-connected output ports. This gives problems when I do simulations. Like the simulation tool looks for Q and Q-bar in a flop.
How do I tell DC not to remove un-connected ports? Can DC insert some wire in the port and leave it?
Thanks