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Poll: ASIC design tools for Solaris

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antipattern

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Hi,

I bought a Sun Ultra 400 eventually after struggling with various PC related tools. I would like to get some recommendations to fill up my ASIC design tool chain on my toy.

Because I want to learn some skills that would be useful for industrial use, please suggest me the best proven tools that I should invest my time to.

I have some selections already:

1. modelsim
2. synopsys synthesis

Thanks,
 

nanako

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u might want to look at vcs or nc-verilog in simulator, performance is far much better than modelsim.

for backend, silicon ensembler
for timing closure analysis, synopsys primetime.

cheers
 

toctory

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for backend, the apollo(for p$r) and star_serials(for physical verify) can also be a good choice.
 

teletex

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I prefr Cadence NC-verilog.
because It's more IEEE standard than modelsim and fast.
and so on.
I think you would learn nassda hsim
for Full chip verification.
 

pookey

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I prefr Cadence NC-verilog + Debussy
 

whatever

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my personal opinion:
system/algorithm: c@dence spw
frontend: S*y*n*o*p*s*y*s
synthesis:design*compiler;
dft:tetra*max
sta:prime*time
sim:V*C*S Or C@dence Nc-veri*log
Debug: Deb*ussy could be a good choice
backend:A*van*t! suite
C@dence Silicon*ensemble
Actually it Depends on what you wanna do.
 

appleleaf

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Besides the tools, another important thing is the design KITS. Libary from the same ASIC vendor must be used from simulation, synthesis, DFT, place route, LVS/DRC/ERC, and even transister simulation.
It is difficult to find such a good design Kit that support all the tools.
Who can provide a design kit?
It is more difficult to find a KITS than the software, but without the KITS, software is no real use.
 

6502

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i agree appleleaf , the thing the most important is design rule or library from vendor i think ,especially in our GuoJia.

I know a company setup a set of library from synthesis to physical cell and sim module for a vendor ,it costs 100,000 usd.

I think it is more valueble than the software to a sucessful design and is really needed to study.

i want to know how about ultra 10 (medium configuration on sun's web)usage and performance for ic design.

yuanjun
 

whatever

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appleleaf said:
Besides the tools, another important thing is the design KITS. Libary from the same ASIC vendor must be used from simulation, synthesis, DFT, place route, LVS/DRC/ERC, and even transister simulation.
It is difficult to find such a good design Kit that support all the tools.
Who can provide a design kit?
It is more difficult to find a KITS than the software, but without the KITS, software is no real use.

I agree too, for study purpose, you can visit:
h**p://www.c@dence.ncsu.edu/CDK.html (t for *, a for @)
for something useful (NCSU C@dence Design Kit),
And, in asic flow, a front designer can get the design kit from the design service provider, like TI, f@r@d@y, etc.

Software is useful when you know what you wanna do.
 

whatever

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6502 said:
i want to know how about ultra 10 (medium configuration on sun's web)usage and performance for ic design.

yuanjun
Mr. yuan: in my experience, ultra 10 is good enough for a design less than 100k gates. (for single user only :( )
 

6502

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thank you , whatever .

i think size of 100k is enough for my design .

yj
 

mutoucanada

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antipattern said:
Hi,

I bought a Sun Ultra 400 eventually after struggling with various PC related tools. I would like to get some recommendations to fill up my ASIC design tool chain on my toy.

Because I want to learn some skills that would be useful for industrial use, please suggest me the best proven tools that I should invest my time to.

I have some selections already:

1. modelsim
2. synopsys synthesis

Thanks,
For my opinion:
Simulation: Modelsim
Synthesis: Synopsys
Layout : Cadence
 

zhoury

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Tool for asic

Here is my list for my last finished work :
synopsys dc,primttime,formality,vcs(like it),
transeda cover
asic vendor's floorplan tool and p&r tool and gate sim tool.
 

SVTONY

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Design database management

How about design database management tool? Will RCS or VCS be just
fine? Or is there any good one?
 

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