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channel length modulation lambda calculation
Mince,
Thanks for the equation. Can you tell me where you get the equation (e.g the reference)? Thank you!
Jianhong
how to calculate channel-length modulation
Dear All,
I have seen some posts regarding this issue. But no one tells how to "Calculate" the lambda from process parameters. I know how to measure Lambda by doing simulation. But I want to know how to calculate it too.
My justifcation to...
Definitely P.R.Gray!
Added after 30 minutes:
I also want to know more about R.J. Wildar. I searched online but couldn't find his biography. Anyone has it and wants to share? Thanks!
transformation laplace vers z
what kind of paper you are looking for? these two transformation are taught in undergraduage course and should be very easily to be found in textbooks.
Z transform is for discrete signal and Laplace transform is for continous signal. If continous system is...
Hello,
I am using VSdir standcell to build a programmable divider for frequency synthesizer. The VCO clock is around 1GHz.
I constructed the schematic using symbols from the library. Now I need to layout the design (by which I mean connecting the standard cells as the cells are already...
Re: dft of sigma delta modulator (cadence analog environment
For sigma delta modulator, the output is a bit stream containing the quantization noise and the signals ( DC or sinewave ). PSD Estimation is the right way to reveal the information.
Assume your sample frequency is 10M, your run...
ibm cmos 7rf process
Dear All,
I am doing TSMC 0.18um layout. I think it would be nice if I can have the detailed description of the process flow, so I can visualize it when I am drawing. What I can find is a very brief description of the process flow with a lot of abbreviations, it is...
I think the duty cycle is decided by your architectures, not by the logic styles.
For example, if the pre-scale is divider by 4, it will be 50% duty clycle, if it is divided by 5, it will have 40% duty cycle.
Anyway,why do you need 50% duty cycle? Most of time It is the edge we care.
comparator kickback noise
I am really interested in knowing how the "kick back noise" is generated. I designed a comparator with this problem, I have been trying to elminate the kickback noise, but I found it is difficult to just modify the comparator without changing the driving condition...
PSRR is only one of measurements you can do by using thhe method jiangwp described.
The reason spectre asks for a input noise is so that it can calculate input-referred noise from any points in circuit to the input.
If you don't care the input-referred noise, you can put a 0v DC voltage source...
Hello All,
After we finish the layout, metal filling is used to meet the density requirement. Do we tie the metal filling to ground or let it floating ? which one is better?
Thanks!
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