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Recent content by leebluer

  1. L

    [SOLVED] Q about rail to rail OPA with high power supply

    Finally Vds of input pairs is limited within low voltage level, and LV MOS are used for better match
  2. L

    Integrated soft start for DC/DC converters

    try to control the time of start up, but not directly control the current.
  3. L

    Bandgap: Phase Margin. Negative and positive loops

    disconnect at the common mode of negative & positive loops, which would sum all the effects of the both.
  4. L

    comparator in closed loop: op-amp or standard comparator?

    it is a buck converter. Comparator should be faster as possible, compared with switching frequency. The loop compensation is not for comparator, while could be considered as Switching System stablity. Refer some about Buck converter, which would help to understand more.
  5. L

    sorry dont like it

    please see the attached figure
  6. L

    sorry dont like it

    i prefer more about the former style. By the current forum, everytime i log in, i need to fresh to update status. (Without F5, my ID cannot appear)
  7. L

    About the compensation capacitor in Miller OTA

    By measured C_V curve, the reverse based MOS CAP achieve better Temperature coefficient & stable unit capatance. In my view, if isolated MOSCAP available, reversed is better.
  8. L

    folded cascode design ..........biasing.........

    it seems the amplifier is in open loop, how about output voltage, which would effect cascode MOS. In my view, the biasing of cascode MOS decide common source MOS status (Linear or Saturate), while output voltage effect the casode stage.
  9. L

    why is bandgap curve upside-down??

    Does 'The TC of all the resistors are set to zero' mean ideal resistor used in the simulation? In my simulation, if negative Tc resistor used, upside curve occurs. If possible, do not change resistor model, but use ideal ones.
  10. L

    Help needed in making a stable opamp with big load

    It seems negative shunt feedback is used in Allen's book (buffered OPs). Could I think the method is to push P2(output pole) higher to A1*Gm/CL, and then make loop stable, especially for larger CL? I met the similar problem, use the structure as below, while loads with 0.1uF Cl. Any other...
  11. L

    Compensation about Class AB loading with 0.1uF CL

    Re: stability about Class AB output stage loading with 1uF C Hi erikl, Do you mean to feedback voltage from the connection between CL and its series resistor? What about the purpose? In the application, there is series R with CL, while i am not sure whether its resistance could be changed...
  12. L

    Compensation about Class AB loading with 0.1uF CL

    Class AB OPA is designed to drive 0.1uF CL, which use floating bias structure shown in the below. Up to now, I couldn't compensate OPA with good stability. With 0.1uF CL, simple miller CAP is hard to seperate the two poles, and cause worse stability. Details are below 1. With Miller...
  13. L

    floating Class AB op with large output cap

    Hi rfsystem, I met the similar problem, which loads with 1uF cap with Class AB output stage. While OP is loading with CAP, i.e. the outputing current should finally decrease to 0. Then how about the sesning-current operation for the final status? Does the compensation work? Sorry, I don't...
  14. L

    [SOLVED] Q about rail to rail OPA with high power supply

    Sorry for the unclear, it is about IC design, not for application

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