ASHUTOSH RANE
Member level 2
hello guys
i am fresher in analog design
i am designing a folded cascode amplifier (ref:- b razavi+ ken martin )
but the problem with my circuit is that i am not getting same values of Vds Vgs Id in cascode branches .........also transistors( mos ) M3 and M7 are not going saturation region ........ can anybody suggest me to improve on it ............
i too have lots of doubts about biasing the circuits like
how to bias transistors M3,M2 and M9,M7??..((..... i mean actual circuitary for that ........))
can u please suggest me some books or papers for reference ...please ..........!!!
for fig check attachment ( cadence 180 umc)
i am fresher in analog design
i am designing a folded cascode amplifier (ref:- b razavi+ ken martin )
but the problem with my circuit is that i am not getting same values of Vds Vgs Id in cascode branches .........also transistors( mos ) M3 and M7 are not going saturation region ........ can anybody suggest me to improve on it ............
i too have lots of doubts about biasing the circuits like
how to bias transistors M3,M2 and M9,M7??..((..... i mean actual circuitary for that ........))
can u please suggest me some books or papers for reference ...please ..........!!!
for fig check attachment ( cadence 180 umc)