floating Class AB op with large output cap

[sillier]

hi,all

I am designing a floating bias class AB buffer, which is reference to Ron Hogervorst. But CL is only 10pF in his paper.Now, I have to keep a large Cl (such as 1uF) , this make the compesation rather critical.

Because large CL, the output pole will be gm/CL, this will be low frequency.The miller compasation will create a low frequency pole too.

At the 1st tapout, I deleted the miller cap, and bias the cascode to linear region to make the internal pole to high frequency.The output pole is the dominant pole.
The silicon result shows it will oscillate.

Have any of you ever design large cap load buffer before?

 

[rfsystem]

To give you a hint what is the dilemma with uF caps load:


1. Pole is defined by gm/Cload

2. Voltage gain from gm-Driver to output is lower than wanted

So you have to add further voltage gain before. But that create the problem that for stable operation the output should be the dominat pole. So the additional gain shift the critial pole gm/C to higher frequency b the amount of the gain. So the pole of the additional gain have to be a first pole higher than gain*gm/C. That is difficult to design.

I good idea is to sense the output driving current and use this as a classic miller compensation. If the cap load is varying the amount of drive current varies and give greater stabilization for bigger caps. A simple solution to this idea is to use an output resistor. Then you sense the differential voltage across the resistor and feed back the differential current to the differential current summing point in the opamp architecture. If you compare the effect to the classic miller where the output load is resistive and the compensation element which transfer output voltage into current is a differencial operator, the idea make this difference operator by the current sensed. The advantage is that this is adaptive to the load cap and you can apply classic miller compensation too.

 

[leebluer]

Hi rfsystem,

I met the similar problem, which loads with 1uF cap with Class AB output stage. While OP is loading with CAP, i.e. the outputing current should finally decrease to 0. Then how about the sesning-current operation for the final status? Does the compensation work?

Sorry, I don't understand your suggestion, would you please explain more?

Thanks in advance