Ghostboy
Newbie level 4
Wrapper
Hi,
I need to send data from a PC via PCI to the FPGA, where the data will be processed (videoprocessing-algorithm), and then sent the result to the PC via PCI.
I already generated the VHDL-code of the algorithm with "Xilinx System Generator" and also have the VHDL-code of the PCI-core.
Anyone who can give me tips for the making of the wrapperfile? Is this a seperate file (top-file) with the rest of the files under it? And does a wrapper has the structure of a FSM?
Or maybe someone who has an example of a wrapperfile?
Thanks in advance.
Hi,
I need to send data from a PC via PCI to the FPGA, where the data will be processed (videoprocessing-algorithm), and then sent the result to the PC via PCI.
I already generated the VHDL-code of the algorithm with "Xilinx System Generator" and also have the VHDL-code of the PCI-core.
Anyone who can give me tips for the making of the wrapperfile? Is this a seperate file (top-file) with the rest of the files under it? And does a wrapper has the structure of a FSM?
Or maybe someone who has an example of a wrapperfile?
Thanks in advance.