Which simulation tool is better, VCS 7.0 or NC-Verilog 5.4 ?

[AlexWan]

VCS7.0 VS. NC-Verilog5.4

hi all,

Did you compare the two simulation tools? What's the result?
And Why?

I think NC is faster than VCS, but my friend tell me he has compared those tools. And VCS is faster! I am so confused.

Thanks

 

[nanako]

VCS7.0 VS. NC-Verilog5.4

latest version of vcs is 7.1.2 and 7.2 is releasing soon. if i'm not wrong when nc-verilog 5.4 was released, the vcs version then was 7.1.1. you can't really benchmark one latest version with an outdated version.

in rtl simulation, i should say there not much different between the two. but in gate level simulation, nc-verilog is still ahead of vcs.

 

[atuo]

Re: VCS7.0 VS. NC-Verilog5.4

I think that the two simulator are all good.But if you want to use other synopsys tools,you do beteer to select VCS.

 

[z81203]

VCS7.0 VS. NC-Verilog5.4

I heard vcs is faster than nc, but nc is more stable & bugless.
Maybe nc had more vendor support also.

 

[floatgrass]

Re: VCS7.0 VS. NC-Verilog5.4

I think tools speed is not most important , both function and easy to use are most important.

 

[AlexWan]

VCS7.0 VS. NC-Verilog5.4

NC-Verilog and VCS all support the Native Compiled Code Simulation.
But I know VCS also support the implement of interrupt blocks to execute continuous assignments. This will add the run-time.

Why is the VCS faster??

 

[maxsnail]

Re: VCS7.0 VS. NC-Verilog5.4

vcs doest support TCL, I cant live without TCL,
though I did not compare them, but I think VCS is do more optimize for speed,

 

[tongson]

VCS7.0 VS. NC-Verilog5.4

Nc-verilog is easy to use!!!

VCS is not be controlled easily!

The speed of them is almost same.

 

[mmazio]

Re: VCS7.0 VS. NC-Verilog5.4

If you use Synopsys DC, the only choice for simulator is VCS.
For RTL debugging, I think NC is better than VCS. But Debussy is a good plus for VCS. The RTL simulation performance of the two if almost the same.

 

[aji_vlsi]

Re: VCS7.0 VS. NC-Verilog5.4

vcs doest support TCL, I cant live without TCL,
though I did not compare them, but I think VCS is do more optimize for speed,

Hi,
VCS 7.2 - the latest release does support a new unified TCL interface. See the release notes for more.

HTH,
Ajeetha
http://www.noveldv.com

 

[AlexWan]

VCS7.0 VS. NC-Verilog5.4

Hi,
Now most designer are using NC of Candece for their designs. Some of those engineers also use VCS for the same projects.


Why to use two or more simulators?

 

[pshiue]

Re: VCS7.0 VS. NC-Verilog5.4

Hi,
From the performance view, I think NC-Verilog should be a good choice. It does not matter which synthesizer you would use.
Best regards,
Paul

 

[arm946es_softcore]

Re: VCS7.0 VS. NC-Verilog5.4

speed of rlt simulation tools depends on you setting of tools,such as ,whether you use pli ,and some switch is on or off.

 

[visualart]

VCS7.0 VS. NC-Verilog5.4

In rtl simulation, there not much different between the VCS and the NC_verilog . in gate level simulation, nc-verilog is still ahead of vcs a little.
If you select the synopsys design flow, VCS is a good selection, Cds flow, than NC is the best

 

[Thomson]

Re: VCS7.0 VS. NC-Verilog5.4

NC-verilog is a cycle-driven based simulator, so if your design is a totally synchronous logic then your performace against VCS will be obtained.

 

[aji_vlsi]

Re: VCS7.0 VS. NC-Verilog5.4

NC-verilog is a cycle-driven based simulator, so if your design is a totally synchronous logic then your performace against VCS will be obtained.

Well that's certainly not true. For instance one can perfectly simulate:

initial
begin
#10 a = 1;
#2 a = 0;
end

in NC/VCS/MTI - which means all have event driven engines. What's "cycle simulatable" may be optimized via a cycle driven engine internally in an implementation. Given that both VCS & NC are neck-2-neck, I presume both have such intelligence inbuilt.

Aji

 

[AlexWan]

VCS7.0 VS. NC-Verilog5.4

Hi, Thomson,

aji_vlsi is right.

NC and VCS all support the Event-driven and Cycle-base simultaion. You can find these feature in their UG.

Good Luck

 

[optor]

Re: VCS7.0 VS. NC-Verilog5.4

If you use Synopsys DC, the only choice for simulator is VCS.
For RTL debugging, I think NC is better than VCS. But Debussy is a good plus for VCS. The RTL simulation performance of the two if almost the same.

If use DC, the VCS becomes the only choice?
Really?

 

[repac]

Re: VCS7.0 VS. NC-Verilog5.4

vcs doest support TCL, I cant live without TCL,
though I did not compare them, but I think VCS is do more optimize for speed,

nc-verilog supports good TCL interface....

i have successfully use TCL interface of NC to do simulation flow control and some simple result check.

If you are TCL user , i think you will like NC.

 

[srini.eda]

Re: VCS7.0 VS. NC-Verilog5.4

vcs doest support TCL, I cant live without TCL,
though I did not compare them, but I think VCS is do more optimize for speed,

nc-verilog supports good TCL interface....

i have successfully use TCL interface of NC to do simulation flow control and some simple result check.

If you are TCL user , i think you will like NC.

Hi,
VCS starting with 7.2 has a Unified TCL interface for HDLs, SystemC, SystemVerilog etc. In the past I have used NC's TCL interface and liked it, and now I see very similar features in VCS too.
Sri