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what is metastability recovery?

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abhineet22

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what is metastability recovery?how we eliminate the condition of metastability?
 

leeenghan

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Hi,

Metastability happen at a flip-flop when the data is switching while the clock is also switching. Depend on the design of flip-flop, there is a finite probability that the output of the flip-flop will stay somewhere in between power and ground for a long period (long is relative to the frequency of the clock. A few tenth of millisecond is very long) before it will goes high or low.

There are flip-flop that is design to reduce the probability of this happen.

The standard solution is to limit the fanout of the flip-flops that could goes into metastable to 1 (usually this flip-flop is receiving asynchronous data, like pressing of a keyboard button, etc), and is connected to another flip-flop in a way called synchroniser (please check google for synchroniser). "Metastable" means that different input pin connect to the same net intrepret the logic signal differently. This might crash a state machine as this is not considered during design.

Regards,
Eng Han
 

eeeraghu

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To my idea,

Metastability occurs is what when there is a setup or hold time violation. So in this state the output of a particular flipflop is in metastability(either 0 or 1) The FF doesnt give an appropriate output. It stays there for few time and then returns to a normal state. Here its metastable recovery.
 

srik_naidu

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hi,
To avoid metastability you can use single or double synchronizers,or increase or decrease of combinational delays or skews.

with regards,
srik.
 

power-twq

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you can use two flipflop to synchronize asynchronization input signal

abhineet22 said:
what is metastability recovery?how we eliminate the condition of metastability?
 

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