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boundry scan is a method to test the logical correctness of the design. via JTAG boundry scan (ieee 1149.1) solves the problem of test access ports by using advanced BGA.
its is simply to check certain design problem.. like design concepts and correct the incorrect output.. actually during ATPG we can use scan flops..scanf flops are different from ordinary flop only for the fact that scan flops have multiplexers and are larger than ordinary flops.
these scanflops help in correctin the out, there are predefined outputs which are set to be in LUTs and there by help in correctin the design...
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