mm_pk1
Newbie level 6
Following is a small piece of code. I wanted to know that if there is no else condition in connection with previous if condition, what kind of hardware will be made after synthesis.
Code:
output [3:0] OUT;
input [3:0] BusIn;
reg [3:0] data;
assign OUT = data;
always @ (posedge CLK)
begin
if(~Flag)
data <= BusIn;
else
date <= data; //what will be the hardware if i omit this line of code
end