Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have seen so many types ,like use C2MOS,dff,I try c2mos , however, when output is low , it can not hold for the full hold clock to make the ouput wrong,how can I deal with it ? Only edge DFF can give me exactly correct code?