your speed is not high, i used of mentioned SH in my project(8bit,1GSPS). besides one of the important factors for choose topology of SH is a type of your ADC. unfortunately i didn't design folded ADC yet. for example if output of SH must drive large cap(parasitic cap), you won't able to use of simple SH and you have to use of SH that contains opamp. in closed loop SH(with opamp), current of opamp will charge parasitic cap whereas hold voltage on sampling capacitor, determines voltage of SH output.