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It is not to see only timing voilation there are lot of reason:
1. you need to check allyour interface.
2. there is no stuck at 0/1 in any flop i.e scan chain is proper.
3. you need to check there is no defect in any of the memory by MBIST.
4. Basic functionality of your chip.
5. there are different type of tests for temperature etc.
For silicon validation... there are always.. DFx (Design for *) features added in to the design...
It goes with the RTL on die...Once the silicon is ready, this feature are used to test whether the silicon is healthy or not. Interms of functionality, routing, all paths, etc.