Silicon characterization

[ranger01]

Can anyone explain what is Silicon characterization?

 

[mail4idle2]

Silicon characterization is characterizing the design parameters after the design is manufactured on silicon to see whether it is meeting all design requirements

 

[ranger01]

Will this characterization be done on ATE? Do we characterize all the components, like LDOs, PLLs, PHYs ?? Could you please explain how characterization can be done on a PLL or an LDO??

 

[mail4idle2]

There are two kinds of characterization bench and ATE. Parameters which cannot be evaluated using the ATE are done on bench. For example rise and fall time of High Speed transmitter

 

[erikl]

Can anyone explain what is Silicon characterization?

Silicon characterization usually is done on finished silicon wafers (as mail4idle2 correctly noted), which have special test structures on different spots of the wafer, in order to measure geometrical, electrical and physical parameter values, together with their distribution (parameter spreading) over the wafer. This is called parameter extraction. After this extraction, the obtained values are used to generate - by complex mathematical methods - the adapted parameter values for the simulator model files (that's why those parameters often get so many absurdly-looking digits ;-) ).

 

[mail4idle2]

erikl,

You are talking about wafer or fab testing which cover yield issues. Here we are talking about functional characterization.

 

[erikl]

mail4idle2,

depends on what you understand from this term, and which one you're more used to. I think both interpretations are valid; from the OP's original question one couldn't know which one he wanted to be explained, isn't it?