Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

IDNL/DNL characterization of the deviation for DAC

FEM33

Newbie
Joined
Jun 12, 2023
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
9
Hello everyone,

For my internship I need to prove why at the midcode, the DNL is the maximum.
I'm designing a 10 bit DAC.
I need to express DNL and INL as a function of (sigmaI/I).
I_LSB = I_OUT_MAX/2^N -1
I found this on internet, maybe its true, but idk how to prove it
1686568332631.png


We need to start from the bottom with that equation :

DNL(k) =( (I(k) - I(k-1) )/I_LSB ) ) - 1

Thanks for all your answers :
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top