Partially depleted silicon on insulator - floating body

[astroshey]

Why does the floating body in PD-SOI can cause sub threshold currents? Thanks

 

[dick_freebird]

PDSOI should not let the body float. The body is substantial and
contains a parasitic NPN or PNP. With its base open, if you don't tie
the body. Any D-B leakage will see BJT current gain. Then you get
things like a stark drain kink effect, history effects (gate pumps
body, now you've got "deltaVT by DRAM").

PDSOI with its body tied correctly, looks just like JI. Except for the
NWell not being a humongous leaky diode to PSub. And The NMOS
body not being pinned to Psub. Both of which are handy.

Anything analog, I'd pick PDSOI (properly tied) over FDSOI, other
than a bang-bang switch (linearity there, is superior owing to the
FDSOI having no S, D bottom plate junction, only oxide C.

 

[astroshey]

PDSOI should not let the body float. The body is substantial and
contains a parasitic NPN or PNP. With its base open, if you don't tie
the body. Any D-B leakage will see BJT current gain. Then you get
things like a stark drain kink effect, history effects (gate pumps
body, now you've got "deltaVT by DRAM").

PDSOI with its body tied correctly, looks just like JI. Except for the
NWell not being a humongous leaky diode to PSub. And The NMOS
body not being pinned to Psub. Both of which are handy.

Anything analog, I'd pick PDSOI (properly tied) over FDSOI, other
than a bang-bang switch (linearity there, is superior owing to the
FDSOI having no S, D bottom plate junction, only oxide C.

Thanks a lot!

 

[timof]

Both types of devices - floating body, and body tied - are used in PDSOI technologies.

When floating body is not at source voltage, due to a finite charge, it’s equivalent to the effect of body voltage on a mosfet, I.e. will lead to higher current at zero gate voltage, I.e. to higher subthreshold leakage.