my present work needs some knowledge abt timing wave forms and timing closure concepts . I dont have much knowledge abt timing closure . can some one please give soem material r links abt these concepts ..
if you have access to either sourcelink or solvnet, u ll find tons of material on timing closure. i'd suggest that u look for timing closure related material in the application(e.g., ddr) where u r working.
hi,
What does timing closure mean? Is it a procedure of meeting timing requeirement?
Is there any difference between timing closure in DDR or other logic design?
Yes, you are right. Timing Closure is to meet the timing requirements by optimizing the circuit.
I dont' know much about DDR circuit, but I think the basic knowledge is the same, if there were any difference, it should be the different definition of setup time, hold time ...
Hi,
The timing clouser is achieved by following methods
1) Modifying constraints suplied to DC
2) RTL partitioning
3) Pipelining the largest delay block