recovery , removal timing checks

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adoweny

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recovery removal

Hi All,

I am a beginner in the ASIC design.

Kindly, would you tell me what is the mean of recovery remval timing check ?

Added after 17 minutes:

I think, it is more or less related to different pathes and hazards.

Is that correct

Added after 1 hours 38 minutes:

thank you all. i got it.

recovery , removal timing checks are related to preset and clear to clock
setup and hold.


thank you all
 

recovery removal check

Hi
to my understanding, the recovery and removal timing check only for the preset and set, the theory just like the setup and hold timing analysis.

the details you can get form the synopsys on line help site SOLD.

welcome other friends to add some new comment on this issue

regards.
 

recovery and removal checks

as far as my understanding goes, recovery and removal times are to latches what setup and hold times are for FFs.
 

recovery and removal

Recovery removal are basically for aynchronous signals in chip.
 
Reactions: ivlsi

    ivlsi

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Re: Recovery and Removal Timing Checks

So, should the Recover & Removal timing reports / checks be generated during STA analysis of the digital sequential design?

Should ever the asynchronous parts of the chip be checked for timing?

Thank you!
 

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