lightcloud
Member level 4
Hi,
I have some question about CTS and route, there are several clock
in design,as in test mode there is only one clock, so all clock domain should
be balance, I adopt the flow as followed:
1. function mode CTS
2. balance interclock delay in function mode
3. PPO2 in function fix setup, hold....
4. PPO2 in test mode, fix hold
5. CTO in function
6. balance interclock delay in function mode
7. route clock net
8. detail route
9. route optimization
10.fix antenna and crosstalk
I meet some question:
1.ater step 5, the interclock skew become very worse
2.after clock route before deail route, the clock skew become worse.
as I have not do detail route, due to deadline, can someone tell me the
method the best way of timeclouse.if there is man DRC error after detail
route,how to deal with it.
Thanks
best regards
I have some question about CTS and route, there are several clock
in design,as in test mode there is only one clock, so all clock domain should
be balance, I adopt the flow as followed:
1. function mode CTS
2. balance interclock delay in function mode
3. PPO2 in function fix setup, hold....
4. PPO2 in test mode, fix hold
5. CTO in function
6. balance interclock delay in function mode
7. route clock net
8. detail route
9. route optimization
10.fix antenna and crosstalk
I meet some question:
1.ater step 5, the interclock skew become very worse
2.after clock route before deail route, the clock skew become worse.
as I have not do detail route, due to deadline, can someone tell me the
method the best way of timeclouse.if there is man DRC error after detail
route,how to deal with it.
Thanks
best regards