You can use AdvanceMS to simulate VHDL-AMS
- VHDL-AMS is a language, a strict superset of VHDL. So all that you can do in VHDL you can do in VHDL-AMS. Additionaly, VHDL-AMS provides "terminals" and resolution of ODEs i.e. handling of continuous-time behaviors.
AdvanceMS additionaly provides a way to mix SPICE-like, VERILOG, VERILOG-AMS, VHDL and VHDL-AMS descriptions.
- Write your model in a text file MyTextFile.vhd
create a library by valib MyLibrary
then compile it vacom MyTextFile.vhd
then run the simulation by launching vasim
- Concerning the amount of time you will save, there is no definitive answer as it will depends on how precise your models are. An amplifier described as vout = A* vin will be faster to simulate than another one including slew-rate, output voltage limitation, noise, ...
Additional info on VHDL-AMS in one of the two attached files
PhD thesis including VHDL-AMS models for SD:
- continuous-time SD but you can re-use the blocks (amplifier, ...):
h**p://edoc.bib.ucl.ac.be:81/ETD-db/collection/available/BelnUcetd-08302005-161547/unrestricted/PhD_LaurentVancaillie_print.pdf
- discrete-time SD
file in attachement
Hope it helps