Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

puzzles about VHDL-AMS models

Status
Not open for further replies.

trashbox

Advanced Member level 4
Joined
Apr 9, 2004
Messages
101
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,298
Location
China
Activity points
879
learn vhdl ams

Hi I plan to learn VHDL-AMS modeling and I am not clear about some issues. Here they go:

1) Which simulator is needed? I have a license for ADvanced MS of Mentor. Is it OK for VHDL-AMS simulation?
2) As I know,VHDL-AMS is used to save time when we simulate mixed-signal circuits such as sigma-delta modulator in ADC and PLLs. How much can it save time? For example, a 2nd-order,signal-loop analog sigma-delta modulator will spend me one or two weeks if I use ADvanced MS of Mentor. If I use VHDL-AMS model, How much time shall I spend on it approximately?
3)How to judge whether my VHDL-AMS is correct or not? I think a reference result is needed. Is it the transistor-level simulation result(use ADvanced MS tools) or Simulink result?

Thanks a lot!
 

I have used Verilog-A, but not VHDL-A, are they same?
If you use verilog-A, many simulators support it, including spectre ultrasim eldo nanosim and hsim.
Verilog-A is between behavior and transistor level. You can either write a behavior function for your circuit or write a model for your element such as transistor resistor capacitor..., and build up your circuit with these models.
It will save lots of simulation time. In my experience, it is faster than matlab simulink.
 

You can use AdvanceMS to simulate VHDL-AMS

- VHDL-AMS is a language, a strict superset of VHDL. So all that you can do in VHDL you can do in VHDL-AMS. Additionaly, VHDL-AMS provides "terminals" and resolution of ODEs i.e. handling of continuous-time behaviors.
AdvanceMS additionaly provides a way to mix SPICE-like, VERILOG, VERILOG-AMS, VHDL and VHDL-AMS descriptions.

- Write your model in a text file MyTextFile.vhd
create a library by valib MyLibrary
then compile it vacom MyTextFile.vhd
then run the simulation by launching vasim

- Concerning the amount of time you will save, there is no definitive answer as it will depends on how precise your models are. An amplifier described as vout = A* vin will be faster to simulate than another one including slew-rate, output voltage limitation, noise, ...

Additional info on VHDL-AMS in one of the two attached files

PhD thesis including VHDL-AMS models for SD:
- continuous-time SD but you can re-use the blocks (amplifier, ...):
h**p://edoc.bib.ucl.ac.be:81/ETD-db/collection/available/BelnUcetd-08302005-161547/unrestricted/PhD_LaurentVancaillie_print.pdf

- discrete-time SD
file in attachement

Hope it helps
 

you use verilog-A, many simulators support it, including spectre ultrasim eldo nanosim and hsim
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top