Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

IBIS models

engr_joni_ee

Advanced Member level 3
Joined
Nov 3, 2018
Messages
750
Helped
2
Reputation
4
Reaction score
4
Trophy points
18
Activity points
6,229
Hi, what is the difference between IBIS and SPICE models. Do we have IBIS models for both digital and analog devices ? How they differ from SPICE models. I guess we don't have SPICE model for digital ICs, or we have ?
--- Updated ---

Is it like that the IBIS models are usually for digital devices and does not need schematic and circuit information. The IBIS models can be used in simulating DDR signal integrity analysis ?
 
Last edited:
IBIS is a crude approximation of I/O characteristics,
generally they are table models which were built from
a series of SPICE /Spectre analyses.

IBIS does not extend into the core to give you through-
chip timing or functionality. It's more about drive strength
and loading effects at the pin / trace.

I believe I've seen at least discussion of running IBIS
models in ngspice but I have not paid attention to the
content. If you look at the basic IBIS docs you should
see "schematics" of the pin electrical circuit that IBIS
model data "informs" such that you could (if you can't
find) make pin models fitted to particulars.
 
I understand that IBIS model is more towards I/O characteristics. For which of electronics components we have IBIS and for which type we don't have.

I have seen IBIS models for ADCs but not for Amplifiers.

ADC don't have SPICE models but Amplifiers have SPICE models.

How can we generalize it. Can we say that for analog devices we usually have SPICE models and for digital devices we normally have IBIS models ?
 
IBIS models only touch I/O "care-abouts" like drive, transition time, and
I've never seen anything for a "through path" let alone all the detail that
a good multi-analysis SPICE model would embody. The purpose is not
for the IC designer or the board level designer to simulate part operation
in detail; it is to enable PCB and signal-integrity folks to get a "good enough"
answer "quick enough" for those kinds of interests. As usual "higher level"
means "lower detail".
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top