problem about Diode and transistor in CMOS technology

[liccAMS]

Could anybody help me about this question:
what is the difference between the Diode and diode connected transistor.
for example,in the bandgap design,we use the PNP with its base and colector connect to ground.
what's the difference to the simple PN junction.

 

[checkmate]

How do you build a p-n junction : p-plus in n-well sitting on substrate.
How do you build a vertical PNP : p-plus in n-well sitting on substrate.

Wait ...

 

[liccAMS]

Hi,checkmate
yes,we use the nowday typical CMOS technology,example tsmc p-sub and n-well CMOS technology. they build PNP : p-plus in n-well sitting on substrate.

this PNP transistor is built as lateral PNP,it also has parasitic vertical PNP .
all the design of bandgap reference in analog books,they use this lateral PNP as PN junction and use the "I=Iss*exp(Vbe/(kT/q)) " to design.
we puzzled even the PNP is PN junction connection,but the PNP transistor's Ib !=0, Ic !=0. Is there any accuracy problem using "I=Iss*exp(Vbe/(kT/q)) " to design?
this is same to the question:what is the difference between this PNP and PN junction ?

waiting for your reply.thanks in advance.

 

[liccAMS]

Can anybody help me.
Waiting for help .......

 

[erikl]

«

what is the difference between this PNP and PN junction ?

see e.g. Camenzind, Hans: Designing Analog Chips , Chapter 1: Devices , p. 1-28 :

"... a much better diode results if you short collector and base together, creating a diode-connected transistor. The transistor is active, it has gain. Only a small fraction of the current flows through the base, which divides the base resistance by the current gain. This connection in fact gives you an almost ideal diode over about five decades of current."

 

[liccAMS]

«

see e.g. Camenzind, Hans: Designing Analog Chips , Chapter 1: Devices , p. 1-28 :

"... a much better diode results if you short collector and base together, creating a diode-connected transistor. The transistor is active, it has gain. Only a small fraction of the current flows through the base, which divides the base resistance by the current gain. This connection in fact gives you an almost ideal diode over about five decades of current."

thank you,erild
the desciption you quote has the assumption as the red word shows.
yes, diode-connected transistor can look as ideal diode at the condition that "a small fraction of the current flows through the base"
but I means that the assumption isn't real, Ib almost equal to Ic and so it can't be ignored.at this situation,we use the PNP as PN to design bandgap reference.How and What it affect the design accuracy? thanks.

 

[erikl]

Ib almost equal to Ic and so it can't be ignored.

At sufficiently low currents (≦10µA) VPNPs usually have B=Ic/Ib ≫ 1 , typ. B=20, even high gain PNPs with B_typ=50 are available from some processes.

 

[liccAMS]

thank you very much,erild
yes,it's very easy to make the VPNP B=Ic/Ib >=20. but in CMOS process VPNP is the parasitic transistor.
we concern on Lateral PNP more.but B=Ic/Ib of LPNP is less than 10. In my simulation in tsmc40nm technology, the B=Ic/Ib of LPNP is no more than 3.
I decress the Ic exaggeratively from 2uA to 20nA, but the B=Ic/Ib keep constant.what's the reason of this phenomenon?
Is the foundry don't model the PNP correctly? or It can't be simulate correctly?

thank you!

 

[erikl]

... Lateral PNP ... B=Ic/Ib of LPNP is less than 10. In my simulation in tsmc40nm technology, the B=Ic/Ib of LPNP is no more than 3.
I decress the Ic exaggeratively from 2uA to 20nA, but the B=Ic/Ib keep constant.what's the reason of this phenomenon?
Is the foundry don't model the PNP correctly?

Yes, I fear so. It's uncommon that a BJT's current gain B doesn't change at all over 2 decades of Ic. So I think they didn't model it correctly, just gave you a worst case value. Still, B≧3 surely is better than using just a diode. I'd use it with an Ic of about 10% of a fully "on" MOSFET Id of similar size.

 

[liccAMS]

Still, B≧3 surely is better than using just a diode. I'd use it with an Ic of about 10% of a fully "on" MOSFET Id of similar size.

Hi,erild
Could you provide some paper or reference for me to study why B≧3 surely is better than using just a diode?
And Could you tell me how to simply calculate the Ic? because the shape of PNP and MOSFET is not same,and how to define the "fully on Id" of MOSFET,Id is depend on the Vgs, example Id=1/2*u*Cox*W/L*(Vgs-Vth)^2. so I have a little puzzle.

 

[erikl]

Could you provide some paper or reference for me to study why B≧3 surely is better than using just a diode?

I'd think you don't need a paper or reference in order to understand that in such case Ib ≦ 1/3 * Ic and so the contribution of the base bulk resistance is a factor of -- at least -- 3 less than that of a simple diode. Just read the above snippet from Hans Camenzind's book again and try to understand its essence.

... Could you tell me how to simply calculate the Ic? because the shape of PNP and MOSFET is not same

current ~ area

and how to define the "fully on Id" of MOSFET,Id is depend on the Vgs, example Id=1/2*u*Cox*W/L*(Vgs-Vth)^2. so I have a little puzzle.

"Fully on Id" means Id @ Vds=Vgs=Vsupply . For a pMOS: S=Vdd , G=D=Gnd .

 

[liccAMS]

I'd think you don't need a paper or reference in order to understand that in such case Ib ≦ 1/3 * Ic and so the contribution of the base bulk resistance is a factor of -- at least -- 3 less than that of a simple diode. Just read the above snippet from Hans Camenzind's book again and try to understand its essence.



current ~ area



"Fully on Id" means Id @ Vds=Vgs=Vsupply . For a pMOS: S=Vdd , G=D=Gnd .

hi,erikl
thank you very much!