Analog CMOS Circuit Design, OPAMP problem.

[mertbaba]

Hi,
I will design an integrated circuit OPAMP in Cadence. I have some problems while designing the circuit. I am planning to use telescopic cascode amplifier and for the second stage, i am planning to use single stage ota design. However, after designing the circuit, I could not observe the desired values. Do you guys have any recommendation for the circuit? The specifications are given below. Thanks for every kinds of helps from now.
1- Input referred voltage noise <7 nV/√Hz
2- Gain bandwidth product (unity gain bandwidth) >5MHz
• Voltage supply 3.3V
• Should be able to drive at least 1pF capacitance
• Output voltage swing, 0.4V-2.9V
• 1/f noise corner <10kHz
• Open loop DC gain >100dB
• Power: minimize <1mA is possible
• You are given a reference current of 10µA, and generate the required biasing

 

[aliarifat794]

Have you included any noise cancelling unit in your circuit?

 

[nitishn5]

However, after designing the circuit, I could not observe the desired values.

What do you mean by the above? Which values are not being observed?

and for the second stage, i am planning to use single stage ota design.

What does the above sentence mean?


Are the transistors biased properly?
Have you set the Gm correctly?
Is this a fully differential amplifier? Do you have CMFB?
Show your circuit so we know what is going on.