xpress_embedo
Advanced Member level 4
i am fresher in this field, Can anybody tell me what parameter defines the final output frequency of vco in pll.
suppose i want to design a pll to give output frequency of 100MHz, this is the frequency to which pll has to lock,
i m using 10 MHz reference, then which parameter i have to set to get this output frequency.
but where i have to define this frequency.
i have gone through the SimPLL of analog devices, but not able to find out answer.
suppose i want to design a pll to give output frequency of 100MHz, this is the frequency to which pll has to lock,
i m using 10 MHz reference, then which parameter i have to set to get this output frequency.
but where i have to define this frequency.
i have gone through the SimPLL of analog devices, but not able to find out answer.