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Modified MCML logic for reducing the threshold voltage effect

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hjzs18

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HI, all:
I am now studying MCML logic , and since the threshold voltage of the diff pair may impair the porformance of the the logic, i want to reduce the effect by using the topology below, i simulated this circuit and found it is really better than the one without using the two feedback transistors, but as i am not unable to reduce what is happening there, i think maybe you can help me find the transfer function of this circuit,

thanks a lot
 

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