[SOLVED] ISCAS combinational circuits required.

[dhaval4987]

Hey all,

I specifically need combinational circuits verilog descriptions by ISCAS. All I find are sequential. Can anyone provide combinational circuits?

 

[dhaval4987]

Nevermind! I already got it on
Index of /~maksim/benchmarks/iscas85/verilog

but I need BSIM model files or any other model files which contains functional descriptions of gates.

Thanks.

 

[snp33]

actually you dont

there are no library instances, all cells declared exist within verilog itself. read a verilog reference.

 

[dhaval4987]

No, the functional description of gates is not declared in the verilog file for which i am looking for.

I think i will have to write it then.

 

[snp33]

gosh...

the functional description is the verilog language! find a good book and you will find out what the nand, buf, or, etc. means.

---------- Post added at 16:34 ---------- Previous post was at 16:29 ----------

search for verilog primitives and you will understand what i am talking about.

 

[dhaval4987]

No snp, I think you misunderstood.

I know what XOR/And/Or is. But what I want to do is that I want to perform of static timing analysis of ISCAS85 benchmark circuits. And the timing tool nanotime does not understand the fucntions of these gates. to make it understand- I need those models. If not that- then I need Spice level descriptions of these combinational circuits.

 

[snp33]

you cant perform sta on those circuits because they havent been synthesized yet. those are not standard cells, those are verilog primitives.

 

[dhaval4987]

This link here has proved very helpful

Perform the SPICE Simulation of ISCAS85 Benchmark Circuits for research