Interview Question: Charge Sharing

[rohit_singh1]

Hi All,

I remember during my phone interview, I was asked about charge sharing:

1) What it is (the interviewer was referring to charge sharing in Dynamic logic)
2) What are its advantages and disadvantages ?

-- I was unable to talk about its advantages. Any ideas ?

TIA.

 

[phoenixpavan]

Hi Rohit,

Charge sharing is SI issue in dynamic logic design. There two phases in a dynamic logic precharge and evaluate. The charge stored on the output node during the precharge phae will be redistributed over o/p node and mos transistor in the discharge path. This causes a drop in output voltage and this cannot be recovered due to the dynamic circuit.

This will be overcome by precharging critical internal nodes also. As internal node is also precharged to Vdd so that charge distribution will not occur between o/p and fet in the discharging path.

This results in increased area and cap.

But this is a result of using dynamic circuits to reduce static power consumption but at the same time has an effect on the output rise time as it increases in this logic style.

cheers

 

[lostinxlation]

Charge sharing is that charges in one node spreads to other nodes and voltage level drops in a dynamic circuit.

Imagine an AND dynamic circuit, where A and B are inputs. You have two NMOSs connected serially, and A goes to the upper NMOS(let's say NMOS1), and B goes to the lower NMOS(let's say NMOS2).
During precharge period, A and B are 0 and both NMOSs are off, and the main node is charged to 1. Then in the next evaluation period, A becomes 1 while B remains 0, so that the charges in the main node must be preserved, however, A=1 turns on NMOS1 and a part of charges in the main node moves to the node between NMOS1 and NMOS2. This results in the voltage drop in the main node and may output a wrong result, depending on the threshold voltage of the output inverter.

To avoid this issue, one solution is precharging those nodes between NMOSs, another solution is making the cap between NMOSs as small as possible with respect to the main node.

As for advantage and disadvantage, I don't think there is any advantage since the charge sharing never works in a positive way in terms of circuit operation.

 

[phoenixpavan]

I cant think of any specific advantage of charge sharing because it effects the signal integrity.
Maybe someone can post if they think there are any advantages.

So Rohit, maybe the interviewer might be referring to the advantage of using dynamic circuits.

 

[rohit_singh1]

Thanks guys. I appreciate your responses. Seriously, I can't think of any advantage either. (Although there is an advantage of charge sharing that is employed in building radiation-hardened analog circuits, but thats totally out of context here).

Hoping for someone to come up with ideas.

---------- Post added at 06:18 ---------- Previous post was at 06:09 ----------

So Rohit, maybe the interviewer might be referring to the advantage of using dynamic circuits.

I highly doubt that because I remember him specifying charge sharing in the question. Good thing is I cleared the phone interview. Have got the onsite in a few days. I hope they don't ask this same question again

 

[sam33r]

AFAIK there are no advantages of charge sharing.