How to Understand Timing/Optimizing After Synthesis

[easytarget]

Hi,

Can someone please suggest a practical book (or anything) on synthesis, that explains timing constraints and optimization? Is this a good book for this purpose:

https://www.amazon.com/exec/obidos/...19545/sr=11-1/ref=sr_11_1/102-9701514-5995354

The documentation that comes with the tools (xilinx, leonardo, synplify) is not enough for my poor brain. And while we're at it, can someone tell me if the pad-to-setup time is the same as the setup time? Thanks a lot.

 

[soccer]

'aisc design with sysnopsys DC PC and PT'

 

[lijian_18]

Or you can read documents in synopsys SOLD such as design compiler tutorial or user guide. That'll help you direcly.

 

[rakeshnunna]

Hi,

"Advanced ASIC Chip Synthesis using DCand PT" by Himanshu Batnagar is a very good book which can help you out"

you can download from this site.

Regards

 

[barkha]

Also you can refer DC_Training material which you can download from here.

 

[hung_wai_ming@hotmail.com]

Refer to SOLD and u got 99% answers. Books are good and most of the time out-dated with the new commands introduced quarterly