How to place bypass capacitor for BG575 BGA package

[fangll]

bypass capacitor placement layout power via

I used xilinx XC2V2000-BG575 package. The Vcore voltage is 1.5V with near 40 Vcore pin, and 3.3V IO voltage with 50 pin. i think it's difficult to put each power pin with one bypass capacitor as close as possible to the chip.
Anyone can give some place advice?

 

[meshmesh]

bypass capacitor

Generally, the bypass capacitors should as close as possible .. In case of BGA, you will never be able to do that exactly .. moreover, you can not place them on the other side of the component because of the routing density around the chip ..

I am using BGA 357 for PowerPC and I just place one or more 100nF cap near to each group of pins .. Take care that you have 2 supply voltages that means that your power planes should be drawn first according to the power pins distribution .. Then Caps with slightly larger values should be about 1 - 2 cm far from the chip ..

Also, be noticed that it is difficult and may be impossible to get the pcb routed if you tried to connect the power pins to the caps before adding vias to connect to the power plane ..

so, just add slightly larger values than 100nF or put more than one cap of 100nf near to each group of power pins ( u may also use tantlum caps near to the chip ) and connect the power pins directly to the power planes by vias .. ( usually, power pins are distributed to make it possible to draw the power planes as zigzag shape ) ..

regards
meshmesh

 

[Santa]

decoupling capacitors 0402 100nf np0

For high-speed components like we have now, isn't 100nF
a bit large as a first line of defense decoupling cap?

The self-resonant freq can be quite low with 100nF and you may need
the cap help very far above this freq in the Z(F) curve. Hence, the
cap impedance will already be too large to quench the switching ripple
at its highest frequency components.

Wouldn't 10nF in 0402 placed closest then 100nF 0603 placed a
little be further better? Tantalum could be placed inches away from
the part

 

[ifarmer]

site:edaboard.com bga inductance

Tantalum can only work around or below 1MHz. For high frequency, you'd better make power and ground plane as closer as possible. And place at least one ceramic caps under the chip, NP0 dielectrics is recommended.
In my opinion, the first cap is important.

 

[tlp71@hotmail.com]

bypass capacitor as close as pissible to

a good idea is place the capacitor on the other side of the board, whitout close the bga ball .
in this case you can place closer the capacitor.
if you read the suggested applications note you can also see whic kind of capacitor is better to use.
Bye
G.

 

[Santa]

bga decoupling

Tantalum can only work around or below 1MHz. For high frequency, you'd better make power and ground plane as closer as possible. And place at least one ceramic caps under the chip, NP0 dielectrics is recommended.
In my opinion, the first cap is important.

Some observations, no pun intended...

It is normaly necessary to ensure proper decoupling to ground of
every BGA supply pin. At the high frequencies encountered now,
this means that the lowest valued cap (= the highest self- resonant freq cap)
should be as close to the BGA pin as possible which is usually under the
pin on the other side of the board.

The choice of NP0 is discutable. Although NPO is surely the most temp
stable and the less influenced by the voltage across it, its volumic
capacity is small and the capacitor would certainly need a larger
package than a X7R one. Hence, the placement of multiple NP0 caps
would become problematic in dense BGA's and the parasitic inductance
of the longer routing leads would rise because of this burden.

While Y5U or Y5V are certainly not to be considered for stability
reasons, X7R is usually the best choice for close pin decoupling.
Larger values of X7R caps are also easily found for the more distant
staggered cap values (100nF or even 4.7uF).

 

[HytekPro]

bypass capacitor bga

You can fan out the Via from the BGA to the 4 corner of the Chip. In this case, you will have space in the Middle of the Chip and you can place the Decoupling Caps right in there on the opposit side. The Caps you can use is 0603 or smaller.

 

[Santa]

place a capacitor

Successful decoupling of fast chips need so low impedances/serial
inductance that routing from a pin to the center of the chip
may be already too much length. In some cases like Xilinx FPGAs, you
have so many different supplies (including VREFs and VCCOs) to route
for each of the eight banks that the you would have to cram a lot of caps
in the bga center area. That area is no free of pins in the case of a BG575
and, for some devices, this means signals that must be routed to the
periphery while the supplies try to do the opposite.