Re: case statement
Hi bharat_in,
Let me look at the problem from a straight fwd perspective.
One output Y, may get a value from either of 4 inputs a0, a1, a2, a3,
depending upon 4 other inputs w0, w1, w2 ,w3. OK?
ok 4to1 mux, but you have 4 lines to select(instead 2, which you normally have), i.e 16 input combinations to decide 4 choices for y i.e a0, a1, a2, a3?
4 choices aur 16 select combinations, bahut beinsaafi hai ye
So to have an exact sim/syn match, you may want to re-write your case statement as
Code:
case w1
4'b0001 :
4'b0010 :
4'b0011 :
4'b0100 :
.
.
4'b1110 :
4'b1111 :
default y = 0;
endcase
you decide under these 16 cirumstances clearly, what Y should get.
This is an absolutely parallel code, with no amiguity, and no sim/syn mismatches.
coding it in a way you have done, is technically correct, but is not very explicit, as to what exactly you are after.
Kr,
Avi
http://www.vlsiip.com