how can man build a MIM or Sandwich-Capacitor by oneself in Cad/Virtuoso

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nnmate

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It's a similar question to this one, https://www.edaboard.com/threads/13886/

but there would be asked with LEDIT.

Can some one share the exeperience once making those caps?

had already draw the layout. Don't know how to defince terminals and do LVS ...Extraction and LVS check are always failed.

Thx a lot
 

This depends rather much on the process used. If you have a process-specific PDK, it usually contains such caps and you could analyze their symbol and layout -- how it's done to match the LVS. Especially MIM caps may have a complex layout, and you often cannot see the proper I layer in layout - mostly identified by a special (non-physical) marking layer, s. your PDK doc.
 

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