yans123
Junior Member level 2
Hi,
I created hierarchy in Virtuoso 6.1.x
I created the transistors from scratch , I mean my basic cell is just
a transistor with pins because I want to simulate my basic transistor with some more adjustments to leakage currents and some reliability issues ,
and than I built my architecture with this basic cells .
My problem is I want to have more control on some of the transisitors characteristic such as Width etc.
How do I make the software do it?
now , when lets say I change in one of the places the width of the transistor
Virtuoso changes it for all theb transistors in the design .
another question I have is regarding leakage currents , How Virtuoso deals with this important issue ? Does it ignores it?
I created hierarchy in Virtuoso 6.1.x
I created the transistors from scratch , I mean my basic cell is just
a transistor with pins because I want to simulate my basic transistor with some more adjustments to leakage currents and some reliability issues ,
and than I built my architecture with this basic cells .
My problem is I want to have more control on some of the transisitors characteristic such as Width etc.
How do I make the software do it?
now , when lets say I change in one of the places the width of the transistor
Virtuoso changes it for all theb transistors in the design .
another question I have is regarding leakage currents , How Virtuoso deals with this important issue ? Does it ignores it?