Help with ASIC projects

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bobjee

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asic projects

Hi All,

I need to design a project spec for a course. The course needs a design project which requires verilog. The verilog code is to be synthesized using cadence. Can some one suggest me good projects or some ideas on which I can design the spec on.

Thank you
 

asic projects

Hi,

The project must be a course project. It must take 8 to 10 weeks to complete the project.

It would be great if the project idea can be useful for real time applications.

Thank you
 

asic projects ideas

Check out opencores.org. Many of the cores there are synthesizable.

A good project might be a ALU supporting IEEE-754 adder/sub, mult, div
 

Hi,

I have checked opencores.org. I have found some interesting projects over there. But I don't think they can be used as a course project. Can some one help me out with few more ideas.

Thank you
 

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