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help me with a concept of using FPGA to verify ASIC Design

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microe_victor

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There is a SoC ,which use ARM9 as the core,
If we want to design a new functional module on this system ,may be as a slave on the AHB
is it necessary to use FPGA to verify the module ?
and how can this be done?
Do we have to implement whole of the RTL code including ARM core and the new module on the same FPGA chip
or we just implement the module we want to verify on FPGA , while connect the FPGA with a PC which runs a ARM core simulator

please help me with this concept :
how to verify a ASIC design (ARM based SoC) on FPGA
 

I think my question can be answered here:

Hardware acceleration maps some or all of the components in a software simulation
into a hardware platform specifically designed to speed up certain simulation operations.
Most commonly, the testbench remains running in software, while the actual
design being verified is run in the hardware accelerator. Some of the options provide
acceleration capability even for testbench.

who can give me an example which has more details please
 

Re: help me with a concept of using FPGA to verify ASIC Desi

it is not necessary to use FPGA or any hardware emulators to verify the RTL design.

10 years ago, people relied on PLD/FPGA to emulate the RTL design before tapeout. the cost was high.

Because nowaday computer is fast, you can develop and integrate C or RTL behavior model testbench to run system simulation to test out your RTL design.
the cost is much lower.
 

I think the FPGA with a PC which runs a ARM core simulator is better, you can easy to debug. but we don't verify like this, we just run simulation on pc.
if you use FPGA, you should debug fpga board, and
may need change you rtl for fpga. those all may has
erro , we think this waste cost and need to do more things.
 

Re: help me with a concept of using FPGA to verify ASIC Desi

Hi,

Verifying the SOC Rtl using FPGA is very fast as compared to simulation. And it gives more test coverage also. Some simulation can take days to complete whereas it can be done in FPGA in minutes.

In this particular case, I think putting the ARM9 and the module under test in a single FPGA will be very efficient. Ofcourse, this will necessitate to use a lot of resources, like board with high density FPGA, ARM debugger tool etc.

As far as changing the original RTL to make it work for FPGA is concerned, it doesn't take much efforts. Only memory replacement and clock-resets have to taken care.

Regards.
 

Whether you want to use FPGA/Emulator for your design is a different question. The answer is yes and no. If you are asking if there are other ways, yes. You can use a simulation environment to do this. FPGA involves a lot of complications and require additional resources.
If you go with FPGA, you can do either way. You can put the ARM core with the new module together on the FPGA, or, you can keep the core out and just use the FPGA for the module. Again, it depends on how much resource is available and what your intention is. If you need a faster test environment, FPGA is the way to go. I would suggest you go with a vendor who can provide you with a FPGA emulator with good debug software to go with it.
 

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