Fixing noise viol -> more noise viol -> Ah! what to do

[Surfingbull]

Hi All,

I have too many noise violations in my design. I tried fixing them by increasing driver strength, wherever I could size-up the cell. This fixed some noise violations, but also caused NEW noise violations as the former victim is now aggressor to other nets.

So I'm back to square one and trying to decide what sub-set of noise nets I need to fix. Can you share your experience in which nets (clock, data, reset, scan-related, test signal, ...etc) w/ noise you need to fix and which you do not?

Can you also share any other "filtering" you do in deciding what nets w/ noise to fix?


Thanks much.

 

[arjun1110]

Re: Fixing noise viol -> more noise viol -> Ah! what t

Hi Surfingbull,

Will you upload noise report file?

Regards,

 

[cop02ia]

Re: Fixing noise viol -> more noise viol -> Ah! what t

Hi,
AFAIK on noise fixing: put distance between the affected nets (i.e. increase spacing between aggressor & victim nets) or do shielding.

The most shielding I did was to shield clock nets with parallel power/ground nets (shielding has to be done with nets of constant voltage) but I also had to shield on different metal layers as well.

Of course that was with analog but the principle is the same. I guess you can regard the shielding nets as filler shapes?

 

[owen_li]

Re: Fixing noise viol -> more noise viol -> Ah! what t

Hi.
I think you can use the following way:

1. insert some buffers or inverters on this victim net. Then it will reduce the parallel length between these two nets. It is very useful.
2. expand the space between these two nets. You can use the shielding or layer change. If the routing resource is ok, you can leverage the victim routing layer
3. power down the driver of the aggressor, that means size down it.
4. tell the logic designer, using the differential signal style
Hope it will help you!