Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

easy question about memory BIST

Status
Not open for further replies.

akrlot

Member level 3
Joined
Jan 14, 2005
Messages
55
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
450
hi;
as we know the BIST is integrated with the memory and we dont need an external tester.my question is when the test of memory is done by the BIST?
thx
 

akrlot said:
hi;
as we know the BIST is integrated with the memory and we dont need an external tester.my question is when the test of memory is done by the BIST?
thx

Since Bist testing is very simple, chip can be tested at anytime.. be it in fab or in the system. typically assert test pin and look for the test pass/fail pin status.
 

    akrlot

    Points: 2
    Helpful Answer Positive Rating
Also, usually BIST can be accessed through the JTAG commands. And, as it was stated already by whizkid, there are some memory BIST, that make periodic tests when memory sub-system is in idle mode.
 

    akrlot

    Points: 2
    Helpful Answer Positive Rating
but if i introduce a memory as a IP core in some circuit, how can i know the assert test pins' status?
 

there a finish output and pass/fail output from bist,

finish indicate bist is done and pass/fail indicate

bist is pass or fail after bist is done.




akrlot said:
hi;
as we know the BIST is integrated with the memory and we dont need an external tester.my question is when the test of memory is done by the BIST?
thx
 

anytime!
in chip simulation, or die testing.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top