[SOLVED] different vector size assighning?

[romikot]

mispar : in STD_LOGIC_VECTOR (4 downto 0); --defining 5 bit input
signal misparregi : std_logic_vector (8 downto 0) ; --defining 9 bit signal
i want to assighn the input "mispar" to the lowest bits in the signal "misparregi"
the compiler gives me an error telling me that they are diffrent sizes.
is there a way around it?

 

[kingslayer]

Dear romikot,

from the above snippet, I guess you are using VHDL. In VHDL, you can accomplish slicing using simple syntax:

misparregi(4 downto 0) <= mispar;

Just remember to keep the direction of the slice in the target vector (misparregi in the example) consistent with its definition.

Hope this helps
Best regards

 

[romikot]

Dear romikot,

from the above snippet, I guess you are using VHDL. In VHDL, you can accomplish slicing using simple syntax:

misparregi(4 downto 0) <= mispar;

Just remember to keep the direction of the slice in the target vector (misparregi in the example) consistent with its definition.

Hope this helps
Best regards

Its not working !:sad: ill post the full code maybe itll be easier to understand my problem.
entity bindiv is
Port ( mispar : in STD_LOGIC_VECTOR (4 downto 0);
mehalek : in STD_LOGIC_VECTOR (4 downto 0);
moza : out STD_LOGIC_VECTOR (4 downto 0);
reset: in std_logic;
clk : in STD_LOGIC);
end bindiv;

architecture Behavioral of bindiv is
signal hishuvim : std_logic_vector (8 downto 0);
hishuvim(4 downto 0)<=mispar;
signal mikum : integer range 4 downto 0 :=4;
begin
process(clk)
begin
if clk'event and clk='1' then
if reset='1' then

mikum<=4;
else

end if;
end if;
end process;
end Behavioral;
im trying to assighn "mispar" to the lowest bits of "hishuvim"
i need "hishuvim" to be (8 downto 0) for later proccessing.

 

[kingslayer]

At first, I suggest you to use the 'code' tags when posting code, otherwise it is difficult to read ;-)

Concerning your code, it simply won't compile since the following assignment

hishuvim(4 downto 0) <= mispar;

should go after the 'begin' keyword related to the 'architecture' section; just leave declarations in the architecture preamble!

Cheers

 

[romikot]

At first, I suggest you to use the 'code' tags when posting code, otherwise it is difficult to read ;-)


Cheers

sorry didnt know that there is that option.
yep i noticed that my code was before the begin.( thanks)