So i expect the Vgs>Vt threshhold voltage to move also ,because we need to put Vg=Vt+Id*Rs to get the transistor opened .
but as you can see in the simulation bellow it stayed steady.
Why is that?
Took me a minute to understand his notation (Vd = Va looks like 1/alpha etc...).
When you say bias point, I assume you mean the saturation pt@Vd on the Id vs Vd scale.
for M1, let deltav = Vgs-Vt
= Vg-Vs-Vt
= Vg - RsId -Vt (1)
and Vd = RsId + deltav (2)
subst 1 into 2
Vd = RsId + Vg-RsId -Vt
Vd = Vg - Vt
Notice there is no dependency on RsId here. So that saturation point@Vd is constant regardless of Rs.
However, VGS does move if you keep VG constant as in the notes. And Current slope is getting flatter with higher Rs as expected. However, current is also moving down as Vout/Rout is getting smaller with larger Rout - so it's not necessarily a good current source as each increase of Rs requires a larger Vg to maintain the same current.
A cascoded mosfet device configuration will have a high total fixed output resistance at the drain, corresponding to aspect ratio and gate bias pts. (assuming both devices are properly biased and in saturation). Equivalent to just operating with one Rs = rds value (made larger by gain path) for source device.
* not sure what you are trying to achieve by sweeping Vg in your simulation. You should sweep the Vd and keep Vg fixed.