Sizing current source (current mirror) using MOSFET transistor

[noor84]

HI,
Please, I am going to design current mirror using MOSFET transistor,
how can I choose the dimensions of the transistors to get high impedance (ro for the transistor) of the current source without channel length modulation.

Regards,

 

[KlausST]

Hi,

A good curent source always has high output impedance. It's the basic function of a current source.

Or are you talking about
* bad regulation (I vs V)
* stray capacitance (what frequency of interest?)

Klaus

 

[FvM]

how can I choose the dimensions of the transistors to get high impedance (ro for the transistor) of the current source without channel length modulation.

You can't. Transistor dimensioning is a matter of different trade-offs. You can reduce (not eliminate !) channel length modulation by increasing L, need to also increase W to keep gm and Idss which in turn increases output capacitance. Channel modulation induced ro can be cancelled by using cascode topology, as mentioned in your previous thread, at higher voltage drop cost. Presume the topic is discussed in detail in your favorite IC design text book.

 

[noor84]

Hi,

A good current source always has high output impedance. It's the basic function of a current source.

Or are you talking about
* bad regulation (I vs V)
* stray capacitance (what frequency of interest?)

Klaus

hi KlausST,

Thank you for your reply,
Yes of course I want to design a current source with high output impedance, this is what I want. But how?
I am asking about the sizing of the transistors in the current source how much W and L?

--- Updated Jan 8, 2023 ---

You can't. Transistor dimensioning is a matter of different trade-offs. You can reduce (not eliminate !) channel length modulation by increasing L, need to also increase W to keep gm and Idss which in turn increases output capacitance. Channel modulation induced ro can be cancelled by using cascode topology, as mentioned in your previous thread, at higher voltage drop cost. Presume the topic is discussed in detail in your favorite IC design text book.

Hi FvM,
Thank you for your reply,

I cannot use cascode (I don't need voltage drop loss).
My question is how can I choose the size of W and L for the current source (current mirror) to keep ro high with (1mA) without affecting channel length modulation?

Please, can you mention a good textbook for designs like these circuits and choosing the dimensions of the transistors?

Thank you once again for your reply.

 

[andre_luis]

can you mention a good textbook for designs like these circuits and choosing the dimensions of the transistors?

This book covers in deep the biasing procedure of CMOS transistors for a wide variety of application circuits:

Cmos Analog Circuit Design​

By Douglas R. Holberg,phillip E. Allen​