ARM SoC Design, Need help getting started

[tariq786]

Hi Guys,

I am an ASIC / FPGA designer who can write verilog code, synthesize it and Place & Route it.

I am new to the ARM world. I am wondering how can i take a verilog code and convert it into ARM assembly. What is the tool chain required and where to get that?


I am also confused about what to use when i hear so many terms like ARM Artisan Physical IP, Logic IP, Standard Cell, Embedded Memory Compilers, Interface IP.

Can someone highlight what are these, when and where to use each of them.

Any pointers or tutorials will be highly appreciated.

THanks

Kind Regards,

 

[rca]

Hi tariq786,
ARM is a processor which need some assembly code to execute a program, there is no relation with Verilog!
The Verilog is used to code the behavior of the processor ARM.
Logic IP = standard cell
Memory compiler is a the name said a tool to generate the memory instance you need to be used in your design.
Interface IP is for example an USB ip, for this example normally two parts one physical due to particular pads needed for USB and the second part at RTL level or macro already placed which contain all needed for USB protocol. but it could be an I2C, SPI, UART...

 

[tariq786]

Hi RCA

Dude thanks for the reply. Actually, i have a verilog code for cortex M0 processor. I am wondering how should i utilize it?

Thanks for clearing the picture a bit.

 

[rca]

The ARM processor used the Amba bus to access the memories (ram/rom/eeprom) and interfaces (via registers mapping).
I expect the CM0 has also bit-banding address?

I expect the CM0 works as the CM3, then at address 0x000 you have the stack pointer address, 0x0001 the reset interupt vector...

 

[tariq786]

rca your last response is not clear to me. Tell me how to best use the cortex M0 verilog core that i have.

Thanks

 

[rca]

eh, that the designer job!!
You need to read the ARM documentation, which explains how the core works.
First your core need a reset and a clock.
When the reset is deasserted and the clock is running, the core will read the address 0x00000000, which contain the reset interrupt vector, which mean, the core will jump to this read value to continue to execute the program, in ARM assembly code.
If my remember is correct the next address is the initialisation stack address pointer.
Then to do all of this, the core will execute a read through the AMBA bus code, prefered bus to access the code.
You need to define which type of memories will contain the reset interrupt vector and the assembly code..., ram or rom or eeprom, or flop, I don't know.

if you already instantiate a core, doing this one will be as usual, you go through the interface to know what the core need.

 

[574920045]

sir,I want to learn the arm cortex m0 verilog code,but I don't get the code.please send the code to me.any help will be highly appreciated.

 

[rca]

no one could shared with you the CMO verilog code. we have sign a aggrement and we pay royalties to be able to used/sell the ARM IP.
only with the documentation you could learn on this core.

 

[574920045]

I can share with you the arm9 verilog code.

 

[vbehravan]

Hi,

ARM provides free behavioral (but synthesizable) verilog code of ARM M0 core for Universities.

VB.