anybody know structured ASIC?

[shrbht]

design flow ? software? thank u

 

[jimjim2k]

Hi

Try TSMC design flow

 

[jbeniston]

For synthesis you should be able to use DC/RTL compiler. They then may have custom P&R tool. Which structured ASIC are you planning to use?

 

[MarcS]

Structured ASIC is a modern form of using gate array techniques to customize uncommited logic on an SoC.

This methodology was promoted by semiconductor vendors like LSI Logic (RapidChip), On Semiconductor (formerly AMI Semi). It has however failed in the market and most efforts have been discontinued.

The front-end tools (before placement) don't much care if the circuit is a structured ASIC or not, so they should all work. The back-end tools (P&R and below) do care. I know that Cadence supported structured ASIC design with their Encounter P&R tool, although I am not sure if they still do. Contacting them would be your best bet.

Magma claimed that its BlastFusion tool supported structured ASIC, but I don't know if it actually did. And I don't know if their new Talus tool continues to support it.

Synopsys have no official support for structured ASIC layout.

 

[shrbht]

thank u!
I think that structured ASIC is a good idea . especially for small IC fabless company.