ADC test
You are right, it will take quite a long time, but even one run might give you an idea of your DNL/INL.
The SFDR is very closely related to the INL of the ADC, so you do not really have to have a DNL/INL plot. Moreover, a simulated DNL/INL does not make very much sense. The papers you refer to - I bet - have measured DNL/INL.
About the noise, if you have a THA, you could find the input referred noise rather easily with a noise analysis (I do not know how to do it in HSPICE); but the noise of the comparator won't be that easy...