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ADC test - INL and DNL both are less than 0.05LSB

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Monady

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ADC test

Hi dear all friends;
i've designed an 8-bit SAR ADC. all parts of ADC are made real and all component values are reasonable. only thing that i didn't take into consideration, was mismatch between inputs of comparator.
i performed an INL/DNL test and applied a ramp input with very slow slope, it means ADC has 12 conversions for each LSB (12 outputs with exactly same bits in ideal situation).
But i saw that output of Hspice is almost same as to the ideal ADC. it means, INL and DNL both are less than 0.05LSB!
i'm sure one thing is wrong but which part? maybe i should add noise to simulation.

I would be appreciate for any suggestion.
 

JoannesPaulus

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ADC test

It is actually possible, in simulation with no mismatch, to achieve such a result especially if your THA and comparator are much faster or more accurate than required by optimal design.
You should try a monte-carlo run and see what happens. Your measured results will, of course be worse than that!

Of course, if you add noise you will get worse results but how are you going to know how much noise you need to add?
 

Monady

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ADC test

Thx for reply.
as you know if i run a monte-carlo (for example 30 runs) with INL/DNL calculation, it will take about 1month! (each INL/DNL calculation takes about 24 hours with Hspice).
i haven't enough time, thus what can i do? i want to have a reasonable INL/DNL values in order to report in my thesis.
in fact i've no any idea about how much noise i must add, how can i find it?
i saw in all of papers about ADCs, INL/DNL are inseparable of their papers. do they use of monte-carlo with INL calculation? really i mixed up!
 

JoannesPaulus

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ADC test

You are right, it will take quite a long time, but even one run might give you an idea of your DNL/INL.

The SFDR is very closely related to the INL of the ADC, so you do not really have to have a DNL/INL plot. Moreover, a simulated DNL/INL does not make very much sense. The papers you refer to - I bet - have measured DNL/INL.

About the noise, if you have a THA, you could find the input referred noise rather easily with a noise analysis (I do not know how to do it in HSPICE); but the noise of the comparator won't be that easy...
 

    Monady

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