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Re: cadstar problem...
Hi
While creating the part which version of Cadstar were u using 8.0?
There may be version mis match.
Is this the problem with this particular part?
Hi devi,
As of now I dont have any documents regarding that,but will upload if i come across any.
It is not necessary that blind vias should come in even layer.Take this example
A four layer board layer structure is
layer 1 - Top electric
layer 2 - GND
layer 3 - VCC
layer 4 - Bottom electric.
We...
Hi all
Cross talk can also be reduced by providing good return path for the signals.In EDA_hg81 case 3 things can be done.
If u have space u can increase the space between the traces this will help to some extent in reducing crosstalk.
Other wise u can route address and data buses in two...
Hi Devi
I didnt have pads with me, but i use Cadstar.I can give some general info on blind and buried vias
1.Buried Vias : They r used in between to layers.They r not visible from the top and bottom layers.
2.Blind Vias : As the name suggests they r closed from one end.They r used from the top...
Hi all
For schematic orcad is the best.
When it comes to layout there is no software to beat Cadstar HS.It has all it requires to make perfect PCB.We can do SI analysis and EMC/EMI analysis.The cost is less when compared to other softwares providing all these features.
We can import the...
Re: query
Hi Ramesh
Choosing the smallest via is good as it reduces the capacitive effect.But before using the via we should consult the fabricator as there may be any manufacturing issues.
Hope this helps.
regards
prasanna
Positive Temperature Coefficient of resistance means the resistance of the material increases as the temperature of the material is increased.
Negative Temperature Coefficient of resistance means the resistance of the material desreases as the temperature of the material is increased.
Mostly...
Re: Basic
As for as shocking is concerned...
I have heard AC shock throws the person, because what i feel is since AC swings in both + and - directions when it passes through the negative direction the person doesnt feel any shock and is released with a force by which he was attracted.
DC...
This holds good for any field not only control systems....
Settling time : It is the time when any system settles down means without any overshoot or understood into a steady state. The time taken by the system to attain this state is called as Settling time.
Peak Time : It is the time at...
Hi all,
Can anyone tell me is it possible to import Visula design capture netlist into allegro ?
If it is possible can anyone tell me the procedure for that.
thanks and regards,
prasanna
Hi all,
I am not telling this as I am supporting the tools CR-5000 Board designer and Cadstar from Zuken for the past 1.5 years.But when compared to all other tools these are the best in the industry in all aspects.
Our customers are happy with the software who have also used other softwares...
Hi
To make it simple
SIGNAL INTEGRITY : Signal Integrity is how a system affects itself. Signal Integrity is the ability of a signal to generate correct responses in a circuit. A signal with good signal integrity has digital levels at required voltage levels at required times.
EMC ...
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