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--- help me ! Cadence 5141 installtion on Linux all versions
I guest that "^M" causes by space character when you save env. file in text mode. It is not suitable with Linux (binary mode). Let check it again
iscas benchmark
I heard that if you want to test a new standard cell (area, power, delay ...), everybody should use ISCAS benchmark circuits (see site: **broken link removed**)
If I design a set of standard cell (OR, INV, NAND ...) in full-custom design, how can I test my logic gates with...
My circuit is very large (wavelet chip) and I want to measure static power, dynamic power and leakage power seperately ?
Is there any efficient method to do that ?
clk of fpga
You should check datasheet of Spartan3 FPGA on Xilinx's websiteto find the limited range of clk freq. In addition, you can check the freq. of crystal oscillator on board.
Simulation with Verilog
I have a module based on Verilog. I also have input/output data files in term text file. Theyt contain signed integers and is generated by Matlab.
I want to Simulation my module by using ModelSim like as
- Read input file correspond with clock signal as a testbench...
Why you donn't use FFT compiler, otherwise you can find many source code in opencores.org or textbook "DSP with FPGA" (in downloaded sub-box)
Good luck
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