How to insert your IO pads and POWER pads to your design ?

[sevid]

dbcreatecellinst

i think you can insert your IO pads by DC after your synthsis,and manually insert your POWER pads after your synthsis.

what do you think ?
when and how do you insert your pads ?

thanks in advance !

 

[rjainv]

io pad design

we have separate synthesis hierarchy and separate hierarchy for padring in RTL.

 

[nandhika]

synopsys astro pad insertion

hi

if u have synopsis manual refer it, in that its given clearly...........

 

[wkong_zhu]

add power pads

I'd like to insert IO PAD in RTL coding, and use synopsys synthesis them the same as stand cell. As long as I have a IO PAD synopsys library.
The power PADs are inserted in Astro manually.

 

[shankarmit]

astro netlist pad

In general IO pads and Power pads insertion will be done manually once u get ur netlist for P & R. i.e, synthesis netlist.

Use add the IO pad cell name and instance name and ur connections to top level pins and internal signal.

Add the IO pad library in as ur reference..


Thanks
Regards
Shankar

Added after 15 seconds:

In general IO pads and Power pads insertion will be done manually once u get ur netlist for P & R. i.e, synthesis netlist.

Use add the IO pad cell name and instance name and ur connections to top level pins and internal signal.

Add the IO pad library in as ur reference..


Thanks
Regards
Shankar

 

[ls000rhb]

how to insert a pad

command "insert_pads" when synthesis or instance the pad directly in verilog code

 

[wkong_zhu]

io pad verilog model -vhdl

in FPGA synthesis ,you can use insert PADs to automatically insert pad into your design. but in Asic, I think manually inert them into RTL is a better choice.

 

[avt]

encounter rtl compiler instantiate power cells

you can do this - but anyway you have to instantiate the pads in some kind of io-file normaly - at least this is the case for encounter ...

but of course pad instantiation is good for post syn simulation ..

 

[hoangthanhtung]

insert pad cells

You should follow manual of standard cell to insert IO pad and power pad by changing netlistfile for the best performance.

 

[deh_fuhrer]

verilog pad instantiate

hi

if u have synopsis manual refer it, in that its given clearly...........

which reference guide are you talking about??

 

[chyau]

rtl compiler iinsert pads

Dear Sir,

if you don't want to add power and I/O pad in netlist.
you can use astro command to add power and I/O pad as following list:

dbCreateCellInst (geGetEditCell) "" "power.FRAM" "power cell instance name" "0" "NO" '(10 10)

pad "I/O cell instance name" "top" 1

Best Regards,
chyau

 

[jtonfat]

io cell i/o cell

Dear Sir,

if you don't want to add power and I/O pad in netlist.
you can use astro command to add power and I/O pad as following list:

dbCreateCellInst (geGetEditCell) "" "power.FRAM" "power cell instance name" "0" "NO" '(10 10)

pad "I/O cell instance name" "top" 1

Best Regards,
chyau

Is there any similar command for cadence design flow? Some command in RTL compiler or SoC encounter to automatically instantiate pads.

 

[visualart]

astro pad netlist

u can insert your pwoer pad with running the coomand :
insertPad padname insertname ....
In the astro, the power pad was called dirty power