How to use ISCAS benchmark circuit ?

[hoangthanhtung]

iscas benchmark

I heard that if you want to test a new standard cell (area, power, delay ...), everybody should use ISCAS benchmark circuits (see site: **broken link removed**)

If I design a set of standard cell (OR, INV, NAND ...) in full-custom design, how can I test my logic gates with ISCAS benchmark ?

If anybody has some example or document, please upload for me

Best regards

 

[hoangthanhtung]

iscas benchmark circuits

Who can help me ? It is very urgent

 

[hoangthanhtung]

iscas benchmark circuit

Is there anybody know about this problem ?

 

[misha82]

benchmark circuit

pls some body ans the above question? i have the same problem.

 

[shandabogo]

i need it too!!!

 

[Oveis.Gharan]

Dear All,
You should Design your Full Custom Standard Cells and Design their Layouts. Then The post-Layout extracted netlists of your custom cells should form a Liberty File which could be used in standard Digital design flow.
Then you could synthesize the ISCAS benchmark circuits with your fully customed library. After synthesize, you can obtain the area, estimated Power consumption and ...

Good Luck
Oveis